EPE Association: EPE 1995 - 29 - Dialogue Session DS2a: Devices, Components and Materials (II)

EPE 1995 - 29 - Dialogue Session DS2a: Devices, Components and Materials (II)
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 1995 - Conference > EPE 1995 - 29 - Dialogue Session DS2a: Devices, Components and Materials (II)

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   Thermal Behavior of Power Modules in PWM-Inverter
By Sven Konrad [View]
[Download]

Abstract: In the following, the thennal behavior of power modules in PWM inverters will be examined. The starting point is an analysis of single-chip and hybrid structures. A parameter for the characterization of the thennal behavior is the dynamic response in time of the thennal impedance between power semiconductor and device header (Ztb curves). For a given substrate configuration, the absolute values of the dynamic response change as a function of chip area, but the time constants do not. This behavior makes it possible to scale the Ztb curves, and thus to establish the basis for generating a thennal equivalent circuit for the-simulation of chip temperatures in PWM inverters. A new aspect of the thennal equivalent circuit is the inclusion of the effects of mutual thermal coupling between individual chips. These effects can be described by means of coupling impedances in combination with the average chip dissipation. Simulations have shown, that this mutual thermal coupling can be treated like a static increase of the chip temperature. At a given dissipation balance, the maximum chip temperature in PWM applications decreases with increasing output frequency, because of the capacitive behavior of the structure. For optimum design of the cooling system it is necessary, therefore, to determine the chip temperatures with good accuracy. By using the method presented here, quick and accurate prediction of the temperatures can be achieved.

   THE DYNAMIC BEHAVIOUR OF POWER TRANSISTORS AT IMPRESSED DI/DT IN ZVS APPLICATIONS
By T. Reimann; J. Petzoldt [View]
[Download]

Abstract: Power transistors (BIT, MOSFET, IGBT) are used in power electronic switches both in the hard switching mode and in soft switching converter topologies as Zero-Voltage-Switch (ZVS) or Zero-Current-Switch (ZCS) to realize higher switching frequencies. The switching processes may be subdevided in these cases into active and passive processes. The passive turning-on of a power electronic switch, i.e. the taking over of a load current with impressed di/dt at a switch voltage of about zero is a typical dynamic process in the ZVS-Mode. Bipolar devices react to impressed dildt with transient on-state voltage spikes and in many applications with non-negligible turn-on losses because of the conductivity modulation. The most important factors of influence on this process is discussed in the paper. A PSpice simulation of the passive turning-on of NPT-IGBT-ZVS is presented.

   EFFECTS OF TEMPERATURE, FORWARD CURRENT, AND COMMUTATING di/dt ON THE REVERSE RECOVERY BEHAVIOUR OF FAST POWER DIODES
By N. Y. A. Shammas; M. T. Rahimo; P. T. Hoban [View]
[Download]

Abstract: In this paper, both experimental and simulation results, showing the effects of Junction Temperature, Forward Current and the Rate of fall of forward Current, or Commutating dildt on the reverse recovery behaviour of modem fast power PIN diodes are presented The main parameters used to characterize the reverse recovery performance of a semiconductor diode, are the reverse recovery charge, peak recovery current and reverse recovery time. The diode snappiness phenomenon due to a current chop-off during reverse recovery, was also investigated and linked with the above parameters.

   SHORT CIRCUIT RUGGEDNESS, SWITCHING, AND STATIONARY BEHAVIOUR OF NEW HIGH VOLTAGE IGBT IN MEASUREMENT AND SIMULATION
By Y. C. Gerstenmaier; G. J. E. Scheller; M. Hierholzer [View]
[Download]

Abstract: Measurement and simulation results on newly developed high voltage (2.8 kV - 4 kV) insulated gate bipolar transistors (IGBT) will be presented. Stationary and switching behaviour and limits of short circuit ruggedness will be investigated by 2-D electrothermal simulation and are compared to measurements. The device failure mechanism under shortcircuit stress is analysed and shown how to avoid. An improved parameter set for impactionization coefficients in numerical device simulation for stronger reduction of avalanche generation at high temperatures is proposed.

   FAST POWER DIODES FABRICATED ON SILICON TO SILICON DIRECT BONDED (SDB) MATERIAL
By R. Wiget; M. Tzvetkova; E. P. Burte [View]
[Download]

Abstract: Fast Hall- and SPEED diodes (Self Adjusting Emitter Efficiency-Diodes) were fabricated on SDB n+/n- substrate material and compared to those built on epitaxial material. Diodes on SDB-material proved to be superior to those on epitaxial silicon layers with respect to reverse recovery time, forward voltage drop and breakdown voltage. Switching behavior of pindiodes was controlled by high energy proton implantation (2.5 MeV). Proton implanted pindiodes were compared to diodes the reverse recovery time and the reverse current of which was reduced by changing the emitter efficiency (SPEED, pin). The dependence of proton implantation on switching behavior and I-V characteristics was investigated for pin and SPEED diodes. Yields of 40% and 90% for diodes on n+/n- epitaxial and SDB layers were achieved, respectevely. For SPEED-diodes with on-voltage comparable to pin diodes, smaller reverse recovery time t and reverse current Irm were obtained. The soft-factor of 1.5 of SPEED diodes reduces the reverse voltage for 20% in comparison to pin-diodes. Reverse recovery times of 70 ns at forward voltage drops of less than 5.2 V at a forward current of 140 A (10 mm2) were realized.

   A CRITICAL EVALUATION OF MODERN IGBT-MODULES
By Frede Blaabjerg; John K. Pedersen; Ulrik Jaeger [View]
[Download]

Abstract: The development of IGBT devices is still moving ahead faster devices with lower losses. This paper will focus on detailed characterization and comparison of six different IGBT -modules representing state-of-the-art for both PT and NPT technologies. The characterization is done on an advanced measurement system. The characterization is based on static and dynamic tests for IGBT's and diodes in the IGBT-modules. Short circuit tests are performed including both non-destructive and destructive tests. The comparison is based on conduction losses, switching losses, reverse recovery peak current, reverse recovery energy and short circuit behaviour of the devices. Finally, the devices are compared in inverter-applications.

   THE INFLUENCE OF DEVICE PARAMETERS AND LOAD CONFIGURATIONS ON THE TURN-ON PERFORMANCE OF GATE TURN-OFF THYRISTORS
By M. J. Evans; F. J.Wakeman; P. A. Mawby [View]
[Download]

Abstract: Comparisons are drawn between the turn-on characteristics of differing voltage grades in symmetrical and anode-shorted type Gate Turn-Off (GTO) thyristors. The influence of the load circuit on the current di/dt is shown to significantly influence the turn-on performance particularly when the voltage tail is considered. The contribution of the turn-on gate current is also considered. Numerical modelling of these devices is used to enhance these comparisons.

   INSULATED GATE BIPOLAR TRANSISTOR FAMILY
By Pierre Aloisi [View]
[Download]

Abstract: switch characteristics must be adapted to the main application requirements: low on losses for a static switch and very fast devices for a switchmode power supply. It is very difficult to built one IGBT with physical characteristics which could fit all these applications. So it will be seen the main switch requirements and how the IGBT technology is split in some sub families taking the physical trade off into account. Oscillograms and results will be shown to sustain the technological choices.

   LATCH-UP MECHANISM AT TURN-ON INDUCED BY THE SUBTHRESHOLD CURRENT IN MOS THYRISTOR AND MCT DEVICES
By J-L. Sanchez; G. Charitat; H. Tranduc; P. Rossel; P. Austin; F. Rossel; F. H. Behrens [View]
[Download]

Abstract: We analyze the latch-up mechanism at turn-on in some special structures of MOS-Thyristor and also in MOS Controlled Thyristor (MCT) devices. The basic concept of subthreshold latch-up is to associate the properties of the subthreshold (diffusion) current in the MOSFET part of the structure with a specific bipolar effect in order to obtain, at turn-on, the negative resistance on the I(V) characteristics inducing this latch-up. In this paper, it is shown that this latch-up can be obtained in optimized structures at very low gate and anode voltages. Several test structures (vertical and lateral) designed to latch-up under the gate threshold voltage, are also described and fabricated. Their experimental electrical properties are presented and compared with the theoretical predictions.

   VERTICAL GaAs MESFET FOR SMART POWER SWITCHING APPLICATIONS
By N. G. Wright; C. M. Johnson; A. G. O'Neill; M. Hossin [View]
[Download]

Abstract: A technologically feasible solution to the need for high-speed power switching devices is presented. The paper details the design of a new GaAs MESFET device capable of operation at voltages up to 800V, currents up to lOA and switching frequencies in excess of 10 MHz.

   CAUSES AND MECHANISMS OF SEMICONDUCTOR DEVICE FAILURES IN POWER CONVERTER SERVICE CONDITIONS
By S. Januszewski; M. Kociszewska-Szczerbik; H. Swiatek, G. Swiatek [View]
[Download]

Abstract: Identification of causes of power semiconductor device failure in service conditions provides an important information on problems of converter circuit design, manufacture and operation. Main failure mechanisms of GTO thyristors, IGBT transistors and power MOSFET are presented. Expert systems used in power semiconductor device failure analysis are discussed.

   A NEW TEST BENCH FOR HIGH POWER TURN-OFF SEMICONDUCTOR DEVICES
By A. Steimel; J. Teigelkötter [View]
[Download]

Abstract: A new test bench for high power turn-off semiconductor devices (GTO, IGBT, MCT, ... ) is described which allows to investigate the switching characteristics of high power devices and the behaviour of snubber circuits under conditions encountered in practical applications. In single-shot operation the junction temperature of the device under test (D.U.T.) can be controlled from -40°C up to +125°C. The turn-on and the turn-off behaviour of the GTOs and the stress of the snubber diodes in the low-loss asymmetrical snubber circuits used in recent high-power locomotive inverters are described and documented with measured results. The reverse recovery of the main feedback diode producing considerable losses is explained. The principal switching waveforms in the asymmetric and the symmetric low-loss snubber circuit are compared.

   NEW HIGH VOLTAGE SWITCHES: SPONTANEOUSLY FIRED MOS-THYRISTOR DEVICES
By J-L. Sanchez; J. Rios; R. Berriane; J. Jalade; P. Austin [View]
[Download]

Abstract: In this paper, two new spontaneously fired MOS-thyristor devices based on the concept of functional integration are investigated. The influence of their physical and technological parameters on the main electrical characteristics has been analyzed using the PISCES software. An optimized fabrication process using SUPREM IV is proposed and the first test structures have been fabricated. The study and the design of these devices are a first step in the integration of the dual thyristor function.

   TRANSIT-TIME OSCILLATIONS DURING INDUCTIVE TURN-OFF OF POWER BJT
By Gianfranco Vitale; Giovanni Busatto; Luigi Fratelli [View]
[Download]

Abstract: Numerical simulation of inductive turnoff transient of power bipolar transistors with narrow (50p.m) cellular structure, revealed that, under suitable drive conditions, high frequency oscillations develop, similar to the IMPATT phenomenon [8] in p-i-n diodes. These oscillations can be a possible origin of device failure that is observed experimentally during the voltage rise in modern BJT's.

   EXPERIMENTAL RESULTS AND MODELLING ABOUT THERMAL INSTABILITY PREDICTION AND CURRENT GAIN IN POWER TRANSISTORS
By S. Pica; G. Scarpetta [View]
[Download]

Abstract: In this paper, thermal instability in power transistors is analysed, both with experimental and simulation results. The experimental set-up consists of an automatic system for the dynamic temperature mapping of semiconductor structure, using the radiometric technique. The simulation consists of an electro-thermal modelling of a power transistor, based on an accurate discretization of the surface layout, taking into account the temperature dependence of the input and output characteristic of the transistor. The guideline is to put in evidence the role that the current gain behaviour plays on thermal phenomena. Simulation results, according to the experimental, allow the conclusion that thermal instability failure starts if the device is biased at a point where the temperature coefficient of current gain is positive and great enough. Current gain behaviour allows also to justify the experimentally observed current and temperature transient evolution during the onset of instability. Finally, simulation capabilities are discussed, keeping in evidence the influence of the layout on the "hot spot" location.

EPE 1995 - 29 - Dialogue Session DS2a: Devices, Components and Materials (II)
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 1995 - Conference > EPE 1995 - 29 - Dialogue Session DS2a: Devices, Components and Materials (II)
	[return to parent folder]

	Thermal Behavior of Power Modules in PWM-Inverter By Sven Konrad	[View] [Download]
Abstract: In the following, the thennal behavior of power modules in PWM inverters will be examined. The starting point is an analysis of single-chip and hybrid structures. A parameter for the characterization of the thennal behavior is the dynamic response in time of the thennal impedance between power semiconductor and device header (Ztb curves). For a given substrate configuration, the absolute values of the dynamic response change as a function of chip area, but the time constants do not. This behavior makes it possible to scale the Ztb curves, and thus to establish the basis for generating a thennal equivalent circuit for the-simulation of chip temperatures in PWM inverters. A new aspect of the thennal equivalent circuit is the inclusion of the effects of mutual thermal coupling between individual chips. These effects can be described by means of coupling impedances in combination with the average chip dissipation. Simulations have shown, that this mutual thermal coupling can be treated like a static increase of the chip temperature. At a given dissipation balance, the maximum chip temperature in PWM applications decreases with increasing output frequency, because of the capacitive behavior of the structure. For optimum design of the cooling system it is necessary, therefore, to determine the chip temperatures with good accuracy. By using the method presented here, quick and accurate prediction of the temperatures can be achieved.

	THE DYNAMIC BEHAVIOUR OF POWER TRANSISTORS AT IMPRESSED DI/DT IN ZVS APPLICATIONS By T. Reimann; J. Petzoldt	[View] [Download]
Abstract: Power transistors (BIT, MOSFET, IGBT) are used in power electronic switches both in the hard switching mode and in soft switching converter topologies as Zero-Voltage-Switch (ZVS) or Zero-Current-Switch (ZCS) to realize higher switching frequencies. The switching processes may be subdevided in these cases into active and passive processes. The passive turning-on of a power electronic switch, i.e. the taking over of a load current with impressed di/dt at a switch voltage of about zero is a typical dynamic process in the ZVS-Mode. Bipolar devices react to impressed dildt with transient on-state voltage spikes and in many applications with non-negligible turn-on losses because of the conductivity modulation. The most important factors of influence on this process is discussed in the paper. A PSpice simulation of the passive turning-on of NPT-IGBT-ZVS is presented.

	EFFECTS OF TEMPERATURE, FORWARD CURRENT, AND COMMUTATING di/dt ON THE REVERSE RECOVERY BEHAVIOUR OF FAST POWER DIODES By N. Y. A. Shammas; M. T. Rahimo; P. T. Hoban	[View] [Download]
Abstract: In this paper, both experimental and simulation results, showing the effects of Junction Temperature, Forward Current and the Rate of fall of forward Current, or Commutating dildt on the reverse recovery behaviour of modem fast power PIN diodes are presented The main parameters used to characterize the reverse recovery performance of a semiconductor diode, are the reverse recovery charge, peak recovery current and reverse recovery time. The diode snappiness phenomenon due to a current chop-off during reverse recovery, was also investigated and linked with the above parameters.

	SHORT CIRCUIT RUGGEDNESS, SWITCHING, AND STATIONARY BEHAVIOUR OF NEW HIGH VOLTAGE IGBT IN MEASUREMENT AND SIMULATION By Y. C. Gerstenmaier; G. J. E. Scheller; M. Hierholzer	[View] [Download]
Abstract: Measurement and simulation results on newly developed high voltage (2.8 kV - 4 kV) insulated gate bipolar transistors (IGBT) will be presented. Stationary and switching behaviour and limits of short circuit ruggedness will be investigated by 2-D electrothermal simulation and are compared to measurements. The device failure mechanism under shortcircuit stress is analysed and shown how to avoid. An improved parameter set for impactionization coefficients in numerical device simulation for stronger reduction of avalanche generation at high temperatures is proposed.

	FAST POWER DIODES FABRICATED ON SILICON TO SILICON DIRECT BONDED (SDB) MATERIAL By R. Wiget; M. Tzvetkova; E. P. Burte	[View] [Download]
Abstract: Fast Hall- and SPEED diodes (Self Adjusting Emitter Efficiency-Diodes) were fabricated on SDB n+/n- substrate material and compared to those built on epitaxial material. Diodes on SDB-material proved to be superior to those on epitaxial silicon layers with respect to reverse recovery time, forward voltage drop and breakdown voltage. Switching behavior of pindiodes was controlled by high energy proton implantation (2.5 MeV). Proton implanted pindiodes were compared to diodes the reverse recovery time and the reverse current of which was reduced by changing the emitter efficiency (SPEED, pin). The dependence of proton implantation on switching behavior and I-V characteristics was investigated for pin and SPEED diodes. Yields of 40% and 90% for diodes on n+/n- epitaxial and SDB layers were achieved, respectevely. For SPEED-diodes with on-voltage comparable to pin diodes, smaller reverse recovery time t and reverse current Irm were obtained. The soft-factor of 1.5 of SPEED diodes reduces the reverse voltage for 20% in comparison to pin-diodes. Reverse recovery times of 70 ns at forward voltage drops of less than 5.2 V at a forward current of 140 A (10 mm2) were realized.

	A CRITICAL EVALUATION OF MODERN IGBT-MODULES By Frede Blaabjerg; John K. Pedersen; Ulrik Jaeger	[View] [Download]
Abstract: The development of IGBT devices is still moving ahead faster devices with lower losses. This paper will focus on detailed characterization and comparison of six different IGBT -modules representing state-of-the-art for both PT and NPT technologies. The characterization is done on an advanced measurement system. The characterization is based on static and dynamic tests for IGBT's and diodes in the IGBT-modules. Short circuit tests are performed including both non-destructive and destructive tests. The comparison is based on conduction losses, switching losses, reverse recovery peak current, reverse recovery energy and short circuit behaviour of the devices. Finally, the devices are compared in inverter-applications.

	THE INFLUENCE OF DEVICE PARAMETERS AND LOAD CONFIGURATIONS ON THE TURN-ON PERFORMANCE OF GATE TURN-OFF THYRISTORS By M. J. Evans; F. J.Wakeman; P. A. Mawby	[View] [Download]
Abstract: Comparisons are drawn between the turn-on characteristics of differing voltage grades in symmetrical and anode-shorted type Gate Turn-Off (GTO) thyristors. The influence of the load circuit on the current di/dt is shown to significantly influence the turn-on performance particularly when the voltage tail is considered. The contribution of the turn-on gate current is also considered. Numerical modelling of these devices is used to enhance these comparisons.

	INSULATED GATE BIPOLAR TRANSISTOR FAMILY By Pierre Aloisi	[View] [Download]
Abstract: switch characteristics must be adapted to the main application requirements: low on losses for a static switch and very fast devices for a switchmode power supply. It is very difficult to built one IGBT with physical characteristics which could fit all these applications. So it will be seen the main switch requirements and how the IGBT technology is split in some sub families taking the physical trade off into account. Oscillograms and results will be shown to sustain the technological choices.

	LATCH-UP MECHANISM AT TURN-ON INDUCED BY THE SUBTHRESHOLD CURRENT IN MOS THYRISTOR AND MCT DEVICES By J-L. Sanchez; G. Charitat; H. Tranduc; P. Rossel; P. Austin; F. Rossel; F. H. Behrens	[View] [Download]
Abstract: We analyze the latch-up mechanism at turn-on in some special structures of MOS-Thyristor and also in MOS Controlled Thyristor (MCT) devices. The basic concept of subthreshold latch-up is to associate the properties of the subthreshold (diffusion) current in the MOSFET part of the structure with a specific bipolar effect in order to obtain, at turn-on, the negative resistance on the I(V) characteristics inducing this latch-up. In this paper, it is shown that this latch-up can be obtained in optimized structures at very low gate and anode voltages. Several test structures (vertical and lateral) designed to latch-up under the gate threshold voltage, are also described and fabricated. Their experimental electrical properties are presented and compared with the theoretical predictions.

	VERTICAL GaAs MESFET FOR SMART POWER SWITCHING APPLICATIONS By N. G. Wright; C. M. Johnson; A. G. O'Neill; M. Hossin	[View] [Download]
Abstract: A technologically feasible solution to the need for high-speed power switching devices is presented. The paper details the design of a new GaAs MESFET device capable of operation at voltages up to 800V, currents up to lOA and switching frequencies in excess of 10 MHz.

	CAUSES AND MECHANISMS OF SEMICONDUCTOR DEVICE FAILURES IN POWER CONVERTER SERVICE CONDITIONS By S. Januszewski; M. Kociszewska-Szczerbik; H. Swiatek, G. Swiatek	[View] [Download]
Abstract: Identification of causes of power semiconductor device failure in service conditions provides an important information on problems of converter circuit design, manufacture and operation. Main failure mechanisms of GTO thyristors, IGBT transistors and power MOSFET are presented. Expert systems used in power semiconductor device failure analysis are discussed.

	A NEW TEST BENCH FOR HIGH POWER TURN-OFF SEMICONDUCTOR DEVICES By A. Steimel; J. Teigelkötter	[View] [Download]
Abstract: A new test bench for high power turn-off semiconductor devices (GTO, IGBT, MCT, ... ) is described which allows to investigate the switching characteristics of high power devices and the behaviour of snubber circuits under conditions encountered in practical applications. In single-shot operation the junction temperature of the device under test (D.U.T.) can be controlled from -40°C up to +125°C. The turn-on and the turn-off behaviour of the GTOs and the stress of the snubber diodes in the low-loss asymmetrical snubber circuits used in recent high-power locomotive inverters are described and documented with measured results. The reverse recovery of the main feedback diode producing considerable losses is explained. The principal switching waveforms in the asymmetric and the symmetric low-loss snubber circuit are compared.

	NEW HIGH VOLTAGE SWITCHES: SPONTANEOUSLY FIRED MOS-THYRISTOR DEVICES By J-L. Sanchez; J. Rios; R. Berriane; J. Jalade; P. Austin	[View] [Download]
Abstract: In this paper, two new spontaneously fired MOS-thyristor devices based on the concept of functional integration are investigated. The influence of their physical and technological parameters on the main electrical characteristics has been analyzed using the PISCES software. An optimized fabrication process using SUPREM IV is proposed and the first test structures have been fabricated. The study and the design of these devices are a first step in the integration of the dual thyristor function.

	TRANSIT-TIME OSCILLATIONS DURING INDUCTIVE TURN-OFF OF POWER BJT By Gianfranco Vitale; Giovanni Busatto; Luigi Fratelli	[View] [Download]
Abstract: Numerical simulation of inductive turnoff transient of power bipolar transistors with narrow (50p.m) cellular structure, revealed that, under suitable drive conditions, high frequency oscillations develop, similar to the IMPATT phenomenon [8] in p-i-n diodes. These oscillations can be a possible origin of device failure that is observed experimentally during the voltage rise in modern BJT's.

	EXPERIMENTAL RESULTS AND MODELLING ABOUT THERMAL INSTABILITY PREDICTION AND CURRENT GAIN IN POWER TRANSISTORS By S. Pica; G. Scarpetta	[View] [Download]
Abstract: In this paper, thermal instability in power transistors is analysed, both with experimental and simulation results. The experimental set-up consists of an automatic system for the dynamic temperature mapping of semiconductor structure, using the radiometric technique. The simulation consists of an electro-thermal modelling of a power transistor, based on an accurate discretization of the surface layout, taking into account the temperature dependence of the input and output characteristic of the transistor. The guideline is to put in evidence the role that the current gain behaviour plays on thermal phenomena. Simulation results, according to the experimental, allow the conclusion that thermal instability failure starts if the device is biased at a point where the temperature coefficient of current gain is positive and great enough. Current gain behaviour allows also to justify the experimentally observed current and temperature transient evolution during the onset of instability. Finally, simulation capabilities are discussed, keeping in evidence the influence of the layout on the "hot spot" location.