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LATCH-UP MECHANISM AT TURN-ON INDUCED BY THE SUBTHRESHOLD CURRENT IN MOS THYRISTOR AND MCT DEVICES
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| Author(s) |
J-L. Sanchez; G. Charitat; H. Tranduc; P. Rossel; P. Austin; F. Rossel; F. H. Behrens |
| Abstract |
We analyze the latch-up mechanism at turn-on in some special structures of MOS-Thyristor and also in MOS Controlled Thyristor (MCT) devices. The basic concept of subthreshold latch-up is to associate the properties of the subthreshold (diffusion) current in the MOSFET part of the structure with a specific bipolar effect in order to obtain, at turn-on, the negative resistance on the I(V) characteristics inducing this latch-up. In this paper, it is shown that this latch-up can be obtained in optimized structures at very low gate and anode voltages. Several test structures (vertical and lateral) designed to latch-up under the gate threshold voltage, are also described and fabricated. Their experimental electrical properties are presented and compared with the theoretical predictions. |
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| Filename: | Unnamed file |
| Filesize: | 380 KB |
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| Type |
Members Only |
| Date |
Last modified 2018-04-12 by System |
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