| Abstract |
In the following, the thennal behavior of power modules in PWM inverters will be examined. The starting point is an analysis of single-chip and hybrid structures. A parameter for the characterization of the thennal behavior is the dynamic response in time of the thennal impedance between power semiconductor and device header (Ztb curves). For a given substrate configuration, the absolute values of the dynamic response change as a function of chip area, but the time constants do not. This behavior makes it possible to scale the Ztb curves, and thus to establish the basis for generating a thennal equivalent circuit for the-simulation of chip temperatures in PWM inverters. A new aspect of the thennal equivalent circuit is the inclusion of the effects of mutual thermal coupling between individual chips. These effects can be described by means of coupling impedances in combination with the average chip dissipation. Simulations have shown, that this mutual thermal coupling can be treated like a static increase of the chip temperature. At a given dissipation balance, the maximum chip temperature in PWM applications decreases with increasing output frequency, because of the capacitive behavior of the structure. For optimum design of the cooling system it is necessary, therefore, to determine the chip temperatures with good accuracy. By using the method presented here, quick and accurate prediction of the temperatures can be achieved. |
