| Abstract |
In this paper, thermal instability in power transistors is analysed, both with experimental and simulation results. The experimental set-up consists of an automatic system for the dynamic temperature mapping of semiconductor structure, using the radiometric technique. The simulation consists of an electro-thermal modelling of a power transistor, based on an accurate discretization of the surface layout, taking into account the temperature dependence of the input and output characteristic of the transistor.
The guideline is to put in evidence the role that the current gain behaviour plays on thermal phenomena.
Simulation results, according to the experimental, allow the conclusion that thermal instability failure starts if the device is biased at a point where the temperature coefficient of current gain is positive and great enough. Current gain behaviour allows also to justify the experimentally observed current and
temperature transient evolution during the onset of instability. Finally, simulation capabilities are discussed, keeping in evidence the influence of the layout on the "hot spot" location. |
