EPE Association: EPE 2023 - DS1b: Active Devices and Components (Wide Bandgap and other New Materials)

EPE 2023 - DS1b: Active Devices and Components (Wide Bandgap and other New Materials)
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2023 ECCE Europe - Conference > EPE 2023 - Topic 01: Devices, Packaging and System Integration > EPE 2023 - DS1b: Active Devices and Components (Wide Bandgap and other New Materials)

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   A Simple Analytical Model for The Reverse-Recovery Overvoltage and Oscillation In a SiC MOSFET Half-bridge Module
By Pham Ha Trieu TO, Hans-Günter ECKEL [View]
[Download]

Abstract: The paper introduces a simple analytical model for the overvoltage and the oscillation on the body's diode of the SiC MOSFET module during its reverse-recovery. The model provides a precise estimation of the overvoltage and the oscillation which can be used for overvoltage protection or the turn-on losses and oscillation optimization.

   Application of the Double Source SwitchingTest to GaN HEMTs
By Tamiris GROSSL BADE, Maroun ALAM, Pascal BEVILACQUA, Hervé MOREL, Dominique PLANSON [View]
[Download]

Abstract: This paper demonstrates the advantages of the switching test circuit 'double source test' (DST) on re-liability and robustness tests on GaN HEMTs. This circuit performs switching tests with an auxiliary switch to short-circuit the DUT while on stand-by, allowing to control of the duration of the drain-source static stress over the DUT.This feature can contribute to the study of the impact of hard switching events on the current collapse of GaN HEMTs independently of the static drain-source stress, when the tests reported in present literature show these effects superposed. Moreover, the DST when programmed for minimum drain-source stress considerably reduced the current collapse on p-GaN gate devices, allowing longer repetitive tests.

   Current Sharing Dynamics During IGBT ZVS Turn-On in a Hybrid Si IGBT/SiC MOSFET Switch
By Marco ANDRADE, Bernardo COUGO, Lenin M. F. MORAIS [View]
[Download]

Abstract: This article describes the current sharing dynamics of a 1200V Si IGBT/SiC MOSFET hybrid switch for Aircraft Applications. Different switching sequences are utilized to switch the Si IGBT at zero voltage in order to reduce total losses. However, during these switching instants, two effects are usually neglected or are not well taken into account. The first is extra conduction losses during the period where SiC MOSFET conducts all the current to ensure IGBT soft switching. The second one is that the current in the IGBT slowly rises after it turns on due to parasitic inductance between IGBT, SiC MOSFET and diode. The focus of this work is to discuss and precisely model these effects and their impact in hybrid switch losses. A method to measure the dynamic behavior of this hybrid switch and precisely determine associated losses is presented and experimentally verified.

   Deadtime optimization eliminating snap-off of 3.3kV SiC MOSFET bodydiodes
By Andreas MAERZ, Stefan SCHOENEWOLF, Andreas NAGEL, Michael RAUH, Mark-M. BAKRAN [View]
[Download]

Abstract: In this paper the bodydiode behavior of 3.3 kV SiC MOSFETs is analyzed under nominal and SOA conditions. At some operating points the reverse-recovery current of the bodydiode shows a snappy behavior. The effect of a device control method to achieve snap-off free diode turn-off and increased output power performance of the converter is shown.

   Design of a Non-destructive Device Test Platform Capable of Double-pulse Tests and Short-circuit Tests with Fast Overcurrent Protection for Wide Band-gap Devices
By Zhebie LU, Francesco IANNUZZO [View]
[Download]

Abstract: Obtaining the characteristics of the device is a key procedure before practical applications. Here inthis paper, the design of a device test platform for wide-bandgap devices is introduced. The platform has a high noise immunity, low loop inductance, and fast overcurrent protection, realizing a non-destructive operation.

   Direct Measurement Based Behavior Modeling for Ultra-low Inductance Silicon Carbide Power Modules
By Ali SHAHABI, Xuning ZHANG, Andy LEMMON, Kevin SPEER [View]
[Download]

Abstract: This work presents a novel modeling method that combines the behavior die modeling and direct parasitic measurement for power modules. A sample of SPICE model creation process was performed on the SP6LI packages with industry leading low inductance for power commutation loop. The SPICE model of the SiC die in the power module was modeled by direct measurement of die behavior using a curve tracer and the parasitic parameters in the power module was modelled by direct impedance measurement using an impedance analyzer. Hardware testing results are also presented and compared with model simulation results for model validation. The results prove the accuracy of the proposed modeling method for SP6LI package over a wide variety of working conditions.

   Double Closed-loop Self-regulating Active Gate Driver with High-bandwidth Peak Voltage Sampling Circuit
By Xinbo CHEN, Han PENG, Shijie SONG [View]
[Download]

Abstract: In this article, a double closed-loop self-regulating active gate driver (DCSAGD) for power device is proposed. The high-bandwidth peak detection circuit based on operational trans-conductance amplifier realize the accurate sampling of vDS\_peak in the ns-level turn-off process. The closed-loop control strategy is realized at low cost by all analog circuit. The experimental results show that the system can accurately control vDS\_peak at 500V/40A working condition under two reference voltage of 700V and 730V.

   Event-Triggered Gate Drive for a 1.7 kV Si-SiC Hybrid Switch with IGBT-like Short-Circuit Robustness
By Felix KAYSER, Hans-Günter ECKEL [View]
[Download]

Abstract: A novel event-triggered gate drive for a Si-SiC hybrid switch is proposed and validated with measurements. The hybrid switch consists of paralleled Si-IGBT and SiC-MOSFET and requires a dedicated gate drive strategy to efficiently combine both semiconductor technologies. The proposed gate driver provides zero-voltage switching for the SiC MOSFET for decreased switching losses. By driving both switches out of only one external gate signal, it allows the usage of a standardpower module housing for a hybrid switch. Triggering the turn-on of the SiC-MOSFET only at low VCE, the gate driver ensures an IGBT-like short-circuit behavior of the hybrid switch. Therefore a non-robust SiC MOSFET with reduced Rds,on can be used.

   Experimental Evaluation of a Monolithic Gallium Nitride Devices Solution for Flyback Converter Devoted to Auxiliary Power Supply
By Salvatore MUSUMECI, Vincenzo BARBA, Filippo SCRIMIZZI, Federica CAMMARATA, Giuseppe LONGO, Santi RIZZO, Michele PASTORELLI [View]
[Download]

Abstract: The paper deals with an improved high-voltage smart monolithic Gallium Nitride (GaN) Field effect transistor (FET) as a power device integrated with a control circuit and gate driver with protection features. The high energy density and increased switching frequency of the GaN FETs, together with the low voltage control part, allow for the realisation of a DC-DC converter with a reduced size and high performance. In the paper, a Flyback converter based on the monolithic integrated power switch and signal circuits is described and experimentally evaluated to demonstrate the effectiveness of the proposed solution.

   Fast and Accurate Data Sheet based Analytical Turn-on Switching Loss Model for a SiC MOSFET and Schottky Diode Half-Bridge
By Anliang HU, Jürgen BIELA [View]
[Download]

Abstract: This paper proposes a novel data sheet based, fully analytical turn-on switching loss model for a SiC MOSFET and Schottky diode half-bridge including parasitics. The proposed model shows similar accuracy (error around 28\%) compared to analytical switching loss models without closed-form analytical equations in the literature, while reducing the computational effort by more than 20 times. In addition, the proposed model shows the best accuracy (error around 12.4\%) compared to other fully analytical switching loss models in the literature, which is verified by using measured device characteristics instead of data sheet information. The accuracy of the proposed model is comprehensively verified by double pulse tests using 5 different SiC MOSFET (with different structures) and Schottky diode pairs from different manufacturers.

   Fast Switching of GaN Transistors using a Boosted Gate Voltage
By Edward SHELTON, Dan ROGERS, Patrick PALMER [View]
[Download]

Abstract: This paper presents a gate-driving strategy for achieving fast switching edges from GaN HEMT transistors. Switching losses can be reduced by using zero-ohms external gate resistance, whilst further reductions are achieved by overcoming the limitations of internal gate resistance with gate voltage boosting during key regions of the switching transition.

   Full-SiC Single-Chip High-Side and Low-Side Dual-MOSFET for Ultimate Efficient Power Vertical Integration - Basic Concept and Technology
By Ralph MAKHOUL, Nour BEYDOUN, Abdelhakim BOURENNANE, Luong Viêt PHUNG, Lazar MIHAI, Frédéric RICHARDEAU, Philippe GODIGNON, Dominique PLANSON, Hervé MOREL, David BOURRIER [View]
[Download]

Abstract: A full monolithic integration in multi-terminal SiC dies of a generic H-bridge power converter (800V/10A) consisting of dual N-type vertical MOSFET switches within only two multi-terminal chips is proposed. Innovative two multi-terminal monolithic power SiC-chips are introduced and studied by 2D Sentaurus TCAD simulations. The first one integrates the high-side row switches of the bridge and the second one integrates the low-side row switches. Static and dynamic operating modes were validated through 2D-Mixed-Mode simulations. Main new process bricks allowing back-side insulating trenches based on plasma combined with photo-electrochemical etching are experimentally evaluated for the first time on power device SiC wafer.

   General Analytical Model for SiC MOSFETs Turn-Off Loss Considering No Miller Plateau
By Shijie SONG, Han PENG, Xinbo CHEN, Xin HAO [View]
[Download]

Abstract: Conventional analytical loss models based on flat Miller plateau cannot predict the turn-off loss precisely under quasi-zero turn-off loss condition, where SiC device's channel current has dropped to zero before the completion of voltage transient. To solve this problem, this article presents the criterion of determining turn-off condition and a general analytical loss model for SiC MOSFETs turn-off loss considering no Miller Plateau. Experiments are carried out and the results verify the analysis.

   Generic Semi-Physical SiC MOSFET Model for the Simulation of Switching Processes
By Patrick HOFSTETTER, Viktor HOFMANN, Mark-M. BAKRAN [View]
[Download]

Abstract: This paper proposes a simple generic semi-physical SiC MOSFET model for the simulation of switching processes. This can be used for the optimization of losses or to test gate drive techniques. The model only needs parameters, which can be obtained from the datasheet. The Common Source elements and dynamic transfer characteristics are the only exceptions and can easily be measured. The proposed model is _nally compared to switching measurements and to a SPICE model of the manufacturer to prove the applicability and accuracy.

   Investigation on Single and Split Output Gate Configurations Influence on the GaN-HEMTs Switching Behaviours
By Xuyang LU, Arnaud VIDET, Nadir IDIR, Vlad MARSIC, Petar IGIC, Soroush FARAMEHR [View]
[Download]

Abstract: This work investigates the power GaNHEMTs switching behaviour differences resulted from usage of two gate driving configurations: single and split outputs. The analysis based on simulation and experimental results show that GaN-HEMTs could switch slower and cause higher switching losses when the split output configuration is used. This is because the output capacitance (Coss) of MOSFETs inside gate driver will be charged during the turn-on process of GaN-HEMTs, and this charging process can reduce the charging speed of input capacitance (Ciss) of GaN-HEMTs. Moreover, thegate resistance and parasitic inductance are the main parameters selected for analysis, and their distribution can amplify this effect by increasing the impedance ratio of turn-on and turn-off loop. This research provides guiding suggestions for gate driver and high efficiency GaNHEMTs power module design.

   Layout Design Principle for Optimization of Transient Current Distribution among Paralleled SiC MOSFETs in Multichip Modules
By Man ZHANG, Helong LI, Zhiqing YANG, Shuang ZHAO, Xiongfei WANG, Lijian DING [View]
[Download]

Abstract: This paper gives a layout design principle for multichip SiC MOSFET power modules taking the transient current distribution among paralleled dies into consideration. A few typical power module layouts are analyzed and modeled with parasitic layout parameters. With the analysis and comparison, a universal and practical design principle is proposed, which is to make the direction of parallel connections perpendicular to the direction of current flow. Applying this design principle mitigates the di/dt through the parasitic inductance between the source terminals of the paralleled dies. Furthermore, this approach avoids current coupling effects, which aggravate transient current imbalances. The design principle is verified with experimental results.

   New Methodology for Defining Integration Limits Used for Switching Energy Computation in Power Devices
By Joao OLIVEIRA, Bernardo COUGO, Fabio COCCETTI, Stéphane AZZOPARDI, Hervé MOREL [View]
[Download]

Abstract: Switching losses of a power converter is a relevant factor that contributes to total losses. Forbuilding an optimized design, it is essential to accurately estimate switching energy in order to define certain parameters such as maximum operating frequency and cooling system. Power SiC MOSFETs have high switchingspeed capability, thus the voltage and current alignment should be performed carefully during classical dynamic characterization methods. In addition, the definition of integration limits of instantaneous power during switching events can generate erroneous results. In this paper, a new methodology for switching energy computation is proposed and validated for different manufacturers. This method is less sensitive to oscillations on voltage and current waveforms with respect to other classical methods.

   Static and Dynamic Characterization of a 1.2 kV SiC MOSFET in Third Quadrant
By Matthieu MASSON, Marc COUSINEAU, Nicolas ROUGER, Frédéric RICHARDEAU [View]
[Download]

Abstract: In this paper, the 3rd quadrant behavior of a 1.2 kV SiC MOSFET without additional anti-parallel diode is investigated. More specifically, the effect of the gate-source voltage on the reverse conduction is presented, and shows a strong dependency even for a gate voltage varying below the threshold voltage. The static characterization is compared to three other types of MOSFETs that present a stronger reverse current path due to their architectures. A dynamic characterization is also performed to describe the transition between the body-diode conduction and the channel reverse conduction within the 3rd quadrant (a.k.a. synchronous rectification). Both static and dynamic behaviors are compared to the device's LTspiceTM model and highlights the differences between experiment and simulation in 3rd quadrant as the gate voltage below the threshold voltage is not taken into account in this model. Insights towards a more precise modeling for this operating region are discussed at the end of the article.

EPE 2023 - DS1b: Active Devices and Components (Wide Bandgap and other New Materials)
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2023 ECCE Europe - Conference > EPE 2023 - Topic 01: Devices, Packaging and System Integration > EPE 2023 - DS1b: Active Devices and Components (Wide Bandgap and other New Materials)
	[return to parent folder]

	A Simple Analytical Model for The Reverse-Recovery Overvoltage and Oscillation In a SiC MOSFET Half-bridge Module By Pham Ha Trieu TO, Hans-Günter ECKEL	[View] [Download]
Abstract: The paper introduces a simple analytical model for the overvoltage and the oscillation on the body's diode of the SiC MOSFET module during its reverse-recovery. The model provides a precise estimation of the overvoltage and the oscillation which can be used for overvoltage protection or the turn-on losses and oscillation optimization.

	Application of the Double Source SwitchingTest to GaN HEMTs By Tamiris GROSSL BADE, Maroun ALAM, Pascal BEVILACQUA, Hervé MOREL, Dominique PLANSON	[View] [Download]
Abstract: This paper demonstrates the advantages of the switching test circuit 'double source test' (DST) on re-liability and robustness tests on GaN HEMTs. This circuit performs switching tests with an auxiliary switch to short-circuit the DUT while on stand-by, allowing to control of the duration of the drain-source static stress over the DUT.This feature can contribute to the study of the impact of hard switching events on the current collapse of GaN HEMTs independently of the static drain-source stress, when the tests reported in present literature show these effects superposed. Moreover, the DST when programmed for minimum drain-source stress considerably reduced the current collapse on p-GaN gate devices, allowing longer repetitive tests.

	Current Sharing Dynamics During IGBT ZVS Turn-On in a Hybrid Si IGBT/SiC MOSFET Switch By Marco ANDRADE, Bernardo COUGO, Lenin M. F. MORAIS	[View] [Download]
Abstract: This article describes the current sharing dynamics of a 1200V Si IGBT/SiC MOSFET hybrid switch for Aircraft Applications. Different switching sequences are utilized to switch the Si IGBT at zero voltage in order to reduce total losses. However, during these switching instants, two effects are usually neglected or are not well taken into account. The first is extra conduction losses during the period where SiC MOSFET conducts all the current to ensure IGBT soft switching. The second one is that the current in the IGBT slowly rises after it turns on due to parasitic inductance between IGBT, SiC MOSFET and diode. The focus of this work is to discuss and precisely model these effects and their impact in hybrid switch losses. A method to measure the dynamic behavior of this hybrid switch and precisely determine associated losses is presented and experimentally verified.

	Deadtime optimization eliminating snap-off of 3.3kV SiC MOSFET bodydiodes By Andreas MAERZ, Stefan SCHOENEWOLF, Andreas NAGEL, Michael RAUH, Mark-M. BAKRAN	[View] [Download]
Abstract: In this paper the bodydiode behavior of 3.3 kV SiC MOSFETs is analyzed under nominal and SOA conditions. At some operating points the reverse-recovery current of the bodydiode shows a snappy behavior. The effect of a device control method to achieve snap-off free diode turn-off and increased output power performance of the converter is shown.

	Design of a Non-destructive Device Test Platform Capable of Double-pulse Tests and Short-circuit Tests with Fast Overcurrent Protection for Wide Band-gap Devices By Zhebie LU, Francesco IANNUZZO	[View] [Download]
Abstract: Obtaining the characteristics of the device is a key procedure before practical applications. Here inthis paper, the design of a device test platform for wide-bandgap devices is introduced. The platform has a high noise immunity, low loop inductance, and fast overcurrent protection, realizing a non-destructive operation.

	Direct Measurement Based Behavior Modeling for Ultra-low Inductance Silicon Carbide Power Modules By Ali SHAHABI, Xuning ZHANG, Andy LEMMON, Kevin SPEER	[View] [Download]
Abstract: This work presents a novel modeling method that combines the behavior die modeling and direct parasitic measurement for power modules. A sample of SPICE model creation process was performed on the SP6LI packages with industry leading low inductance for power commutation loop. The SPICE model of the SiC die in the power module was modeled by direct measurement of die behavior using a curve tracer and the parasitic parameters in the power module was modelled by direct impedance measurement using an impedance analyzer. Hardware testing results are also presented and compared with model simulation results for model validation. The results prove the accuracy of the proposed modeling method for SP6LI package over a wide variety of working conditions.

	Double Closed-loop Self-regulating Active Gate Driver with High-bandwidth Peak Voltage Sampling Circuit By Xinbo CHEN, Han PENG, Shijie SONG	[View] [Download]
Abstract: In this article, a double closed-loop self-regulating active gate driver (DCSAGD) for power device is proposed. The high-bandwidth peak detection circuit based on operational trans-conductance amplifier realize the accurate sampling of vDS\_peak in the ns-level turn-off process. The closed-loop control strategy is realized at low cost by all analog circuit. The experimental results show that the system can accurately control vDS\_peak at 500V/40A working condition under two reference voltage of 700V and 730V.

	Event-Triggered Gate Drive for a 1.7 kV Si-SiC Hybrid Switch with IGBT-like Short-Circuit Robustness By Felix KAYSER, Hans-Günter ECKEL	[View] [Download]
Abstract: A novel event-triggered gate drive for a Si-SiC hybrid switch is proposed and validated with measurements. The hybrid switch consists of paralleled Si-IGBT and SiC-MOSFET and requires a dedicated gate drive strategy to efficiently combine both semiconductor technologies. The proposed gate driver provides zero-voltage switching for the SiC MOSFET for decreased switching losses. By driving both switches out of only one external gate signal, it allows the usage of a standardpower module housing for a hybrid switch. Triggering the turn-on of the SiC-MOSFET only at low VCE, the gate driver ensures an IGBT-like short-circuit behavior of the hybrid switch. Therefore a non-robust SiC MOSFET with reduced Rds,on can be used.

	Experimental Evaluation of a Monolithic Gallium Nitride Devices Solution for Flyback Converter Devoted to Auxiliary Power Supply By Salvatore MUSUMECI, Vincenzo BARBA, Filippo SCRIMIZZI, Federica CAMMARATA, Giuseppe LONGO, Santi RIZZO, Michele PASTORELLI	[View] [Download]
Abstract: The paper deals with an improved high-voltage smart monolithic Gallium Nitride (GaN) Field effect transistor (FET) as a power device integrated with a control circuit and gate driver with protection features. The high energy density and increased switching frequency of the GaN FETs, together with the low voltage control part, allow for the realisation of a DC-DC converter with a reduced size and high performance. In the paper, a Flyback converter based on the monolithic integrated power switch and signal circuits is described and experimentally evaluated to demonstrate the effectiveness of the proposed solution.

	Fast and Accurate Data Sheet based Analytical Turn-on Switching Loss Model for a SiC MOSFET and Schottky Diode Half-Bridge By Anliang HU, Jürgen BIELA	[View] [Download]
Abstract: This paper proposes a novel data sheet based, fully analytical turn-on switching loss model for a SiC MOSFET and Schottky diode half-bridge including parasitics. The proposed model shows similar accuracy (error around 28\%) compared to analytical switching loss models without closed-form analytical equations in the literature, while reducing the computational effort by more than 20 times. In addition, the proposed model shows the best accuracy (error around 12.4\%) compared to other fully analytical switching loss models in the literature, which is verified by using measured device characteristics instead of data sheet information. The accuracy of the proposed model is comprehensively verified by double pulse tests using 5 different SiC MOSFET (with different structures) and Schottky diode pairs from different manufacturers.

	Fast Switching of GaN Transistors using a Boosted Gate Voltage By Edward SHELTON, Dan ROGERS, Patrick PALMER	[View] [Download]
Abstract: This paper presents a gate-driving strategy for achieving fast switching edges from GaN HEMT transistors. Switching losses can be reduced by using zero-ohms external gate resistance, whilst further reductions are achieved by overcoming the limitations of internal gate resistance with gate voltage boosting during key regions of the switching transition.

	Full-SiC Single-Chip High-Side and Low-Side Dual-MOSFET for Ultimate Efficient Power Vertical Integration - Basic Concept and Technology By Ralph MAKHOUL, Nour BEYDOUN, Abdelhakim BOURENNANE, Luong Viêt PHUNG, Lazar MIHAI, Frédéric RICHARDEAU, Philippe GODIGNON, Dominique PLANSON, Hervé MOREL, David BOURRIER	[View] [Download]
Abstract: A full monolithic integration in multi-terminal SiC dies of a generic H-bridge power converter (800V/10A) consisting of dual N-type vertical MOSFET switches within only two multi-terminal chips is proposed. Innovative two multi-terminal monolithic power SiC-chips are introduced and studied by 2D Sentaurus TCAD simulations. The first one integrates the high-side row switches of the bridge and the second one integrates the low-side row switches. Static and dynamic operating modes were validated through 2D-Mixed-Mode simulations. Main new process bricks allowing back-side insulating trenches based on plasma combined with photo-electrochemical etching are experimentally evaluated for the first time on power device SiC wafer.

	General Analytical Model for SiC MOSFETs Turn-Off Loss Considering No Miller Plateau By Shijie SONG, Han PENG, Xinbo CHEN, Xin HAO	[View] [Download]
Abstract: Conventional analytical loss models based on flat Miller plateau cannot predict the turn-off loss precisely under quasi-zero turn-off loss condition, where SiC device's channel current has dropped to zero before the completion of voltage transient. To solve this problem, this article presents the criterion of determining turn-off condition and a general analytical loss model for SiC MOSFETs turn-off loss considering no Miller Plateau. Experiments are carried out and the results verify the analysis.

	Generic Semi-Physical SiC MOSFET Model for the Simulation of Switching Processes By Patrick HOFSTETTER, Viktor HOFMANN, Mark-M. BAKRAN	[View] [Download]
Abstract: This paper proposes a simple generic semi-physical SiC MOSFET model for the simulation of switching processes. This can be used for the optimization of losses or to test gate drive techniques. The model only needs parameters, which can be obtained from the datasheet. The Common Source elements and dynamic transfer characteristics are the only exceptions and can easily be measured. The proposed model is _nally compared to switching measurements and to a SPICE model of the manufacturer to prove the applicability and accuracy.

	Investigation on Single and Split Output Gate Configurations Influence on the GaN-HEMTs Switching Behaviours By Xuyang LU, Arnaud VIDET, Nadir IDIR, Vlad MARSIC, Petar IGIC, Soroush FARAMEHR	[View] [Download]
Abstract: This work investigates the power GaNHEMTs switching behaviour differences resulted from usage of two gate driving configurations: single and split outputs. The analysis based on simulation and experimental results show that GaN-HEMTs could switch slower and cause higher switching losses when the split output configuration is used. This is because the output capacitance (Coss) of MOSFETs inside gate driver will be charged during the turn-on process of GaN-HEMTs, and this charging process can reduce the charging speed of input capacitance (Ciss) of GaN-HEMTs. Moreover, thegate resistance and parasitic inductance are the main parameters selected for analysis, and their distribution can amplify this effect by increasing the impedance ratio of turn-on and turn-off loop. This research provides guiding suggestions for gate driver and high efficiency GaNHEMTs power module design.

	Layout Design Principle for Optimization of Transient Current Distribution among Paralleled SiC MOSFETs in Multichip Modules By Man ZHANG, Helong LI, Zhiqing YANG, Shuang ZHAO, Xiongfei WANG, Lijian DING	[View] [Download]
Abstract: This paper gives a layout design principle for multichip SiC MOSFET power modules taking the transient current distribution among paralleled dies into consideration. A few typical power module layouts are analyzed and modeled with parasitic layout parameters. With the analysis and comparison, a universal and practical design principle is proposed, which is to make the direction of parallel connections perpendicular to the direction of current flow. Applying this design principle mitigates the di/dt through the parasitic inductance between the source terminals of the paralleled dies. Furthermore, this approach avoids current coupling effects, which aggravate transient current imbalances. The design principle is verified with experimental results.

	New Methodology for Defining Integration Limits Used for Switching Energy Computation in Power Devices By Joao OLIVEIRA, Bernardo COUGO, Fabio COCCETTI, Stéphane AZZOPARDI, Hervé MOREL	[View] [Download]
Abstract: Switching losses of a power converter is a relevant factor that contributes to total losses. Forbuilding an optimized design, it is essential to accurately estimate switching energy in order to define certain parameters such as maximum operating frequency and cooling system. Power SiC MOSFETs have high switchingspeed capability, thus the voltage and current alignment should be performed carefully during classical dynamic characterization methods. In addition, the definition of integration limits of instantaneous power during switching events can generate erroneous results. In this paper, a new methodology for switching energy computation is proposed and validated for different manufacturers. This method is less sensitive to oscillations on voltage and current waveforms with respect to other classical methods.

	Static and Dynamic Characterization of a 1.2 kV SiC MOSFET in Third Quadrant By Matthieu MASSON, Marc COUSINEAU, Nicolas ROUGER, Frédéric RICHARDEAU	[View] [Download]
Abstract: In this paper, the 3rd quadrant behavior of a 1.2 kV SiC MOSFET without additional anti-parallel diode is investigated. More specifically, the effect of the gate-source voltage on the reverse conduction is presented, and shows a strong dependency even for a gate voltage varying below the threshold voltage. The static characterization is compared to three other types of MOSFETs that present a stronger reverse current path due to their architectures. A dynamic characterization is also performed to describe the transition between the body-diode conduction and the channel reverse conduction within the 3rd quadrant (a.k.a. synchronous rectification). Both static and dynamic behaviors are compared to the device's LTspiceTM model and highlights the differences between experiment and simulation in 3rd quadrant as the gate voltage below the threshold voltage is not taken into account in this model. Insights towards a more precise modeling for this operating region are discussed at the end of the article.