EPE Association: EPE 2019 - DS1b: Active Devices and Components (Wide Bandgap and Other New Materials)

EPE 2019 - DS1b: Active Devices and Components (Wide Bandgap and Other New Materials)
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2019 ECCE Europe - Conference > EPE 2019 - Topic 01: Devices, Packaging and System Integration > EPE 2019 - DS1b: Active Devices and Components (Wide Bandgap and Other New Materials)

   [return to parent folder]

   A New Method for Measuring Parasitics of Super Junction Power MOSFETs
By Michael FUCHS [View]
[Download]

Abstract: This document proposes a new methodology to measure the voltage-dependent behavior of parasitic capacitances of super junction power MOSFETs. The measurement technique allows to extract all parasitic elements (capacitances and inductances) with only one measurement while a variable DC voltage is applied between the drain and source pin of the super junction MOSFET. The results can be used to create simulation models of MOSFETs and possibly complete power modules, that accurately represent their high frequency behavior to solve electromagnetic compatibility (EMC) problems in transient simulators, such as LTspice.

   A New SiC Power MOSFET Model With a Parameter Optimization Procedure
By Ali ALHOUSSEIN [View]
[Download]

Abstract: In this paper, a characterization and comparison of SPICE models developed by two leading manufacturers of SiC power MOSFETs is carried out. A new SiC power MOSFET model is proposed which combines different aspects of the two manufacturers' models. A fitting algorithm is developed and then used to adjust the new model's parameters to performance data of SiC power MOSFETs.

   An application of Open-Loop Active Gate Voltage Control for GaN Transistors
By Mamadou Lamine BEYE [View]
[Download]

Abstract: This paper presents the feasibility of an open-loop control of Active Gate Voltage Control (AGVC) during turn-on and turn-off of GaN HEMTs in order to reduce the current or voltage switching speed. For the turn-on, two parameters (Vint, Tint) are used to reduce the current transient speed while for the turn-off three parameters (T0, Vint0, Tint0) are used to adjust the voltage transient speed. The results show that the GaN HEMT can be controlled by the AGVC. However this technique is limited by the response time of the commercial gate drivers.

   An Improved SPICE Model for a 1.2-kV, 36-A Discrete Silicon-Carbide MOSFET With Higher Accuracy for a Wide Range of Drain Currents
By Yasushige MUKUNOKI [View]
[Download]

Abstract: This paper describes higher accuracy of an improved SPICE model for a wide range of drain currents for a 1.2-kV, 36-A discrete SiC-MOSFET. The improved SPICE model is developed on the basis of our former Simplorer model by introducing new SPICE codes. Its accuracy and computational stability are validated by comparing the simulated switching waveforms with measurement and that from the manufacture's model up to the drain current of 30 A.

   Analysis of a 1200 V SiC-Si-Hybrid Switch for Resonant Applications with Consideration of Bipolar Desaturation
By Michael MEISSNER [View]
[Download]

Abstract: Hybrid switches consisting of a silicon carbide MOSFET and a silicon IGBT are a promising approachfor power loss reduction in resonant topologies. Potentials and performance are analysed and discussedwith consideration of desaturation of the IGBT.

   Asymmetric Half-Bridge Configurations in Power Electronics Converters
By Leon FAUTH [View]
[Download]

Abstract: The half bridge is the smallest common element of most converter topologies. While these half bridges are conventionally made from identical semiconductor switches, performance can be optimized by combining different switches. In this paper, asymmetrical half bridges will be introduced and categorized, an example circuit will be proposed.

   Impact of blanking time on switching losses in a SiC MOSFET-based converter using capacitive snubbers
By Diane-Perle SADIK [View]
[Download]

Abstract: Wide Bandgap power semiconductors such as SiC MOSFETs, have enabled compact and highly efficient power converters operated at higher frequencies. In converters using SiC MOSFETs and capacitive snubbers, the blanking times may have a significant impact on switching losses. The power losses induced by unnecessary long blanking times have been quantified experimentally. It was found that, at 100 kHz, an adaptive blanking time can reduce the losses by more than 20 \%. As those losses are directly proportional to the switching frequency, an adaptive blanking time is essential when designing for high operation frequencies. Doing so, higher operation frequencies are possible while maintaining a high efficiency.

   Influence of chip parameters spread on power loss sharing of paralleled SiC MOSFETs
By Peng SUN [View]
[Download]

Abstract: This paper focuses on the influence of chip parameters spread on power loss sharing of paralleled SiC MOSFETs. A simulation model of paralleled SiC MOSFETs under switching test is developed foranalyzing the relationship between power loss distribution and chip parameter spread. Thecorresponding physical testbench is built for experimental verification. The spread of different chipparameters, including transfer curve, on-state resistance, internal gate resistance, gate-sourcecapacitance, gate-drain capacitance, drain-source capacitance, from a sample of 30 SiC MOSFETdiscrete devices were tested. The power loss distribution among the paralleled devices was analyzed under different equivalent switching frequencies. The experimental and simulating results show that transfer curve and on-state resistance are the main parameters that affect power loss sharing. Moreover, the influence of different parameters on power loss can be compensated to reduce the power loss unbalance under different switching frequency.

   Integrated GaN ICs, development and performance
By Dominique BERGOGNE [View]
[Download]

Abstract: This paper explores the possibility to achieve an integrated circuit with GaN transistors for power electronics applications. GaN provides only N type transistors. Power transistors are presented with the layout and standard useful characterization results at wafer level and chip level. A gate driver is shown, layout and performance, it demonstrates the difficulty to obtain fast rising edges using only type N type transistors. Another key function for integrated circuit is the level shifter, here a circuit capable of shifting a logic level up above the common rail of an inverter leg switching up to 400V at 1MHz. Finally, an integrated inverter leg is presented and tested switching 400V at 1MHz under 3A.

   Investigation of the Effect of Parasitic Inductances on the Current Balancing of Parallel-Connected Discrete SiC JFETs
By Xiaoqing SONG [View]
[Download]

Abstract: SiC JFETs demonstrate quite a few unique properties like low specific on-resistance, high temperature operation potential benefiting from the simple physical structure, and normally-on characteristics, making it quite attractive for applications like solid-state circuit breakers. However, the parallel operation of the SiC JFETs is not as well documented as that of SiC MOSFETs or Si IGBTs. This paper investigates the parallel operation of the SiC JFETs and the effects of drain, source parasitic inductances of the discrete SiC JFET on the current sharing during parallel operation. The impact of parasitic inductances on current sharing for the parallel connected SiC JFETs are experimentally validated and analyzed. Further, methods to mitigate such unbalanced current sharing is proposed.

   Measuring and Modeling of Dynamic On-State Resistance of GaN-HEMTs
By Benedikt KOHLHEPP [View]
[Download]

Abstract: GaN-HEMTs as switching devices impress with their very good properties and gain therefore a lot ofattention from the power electronics community. However, some GaN devices may exhibit increasedresistance during on-state due to charge trapping effects. As for designers of switch mode power supplies the internal structure of devices is concealed, measurements are the only way to gain information. This paper shows the measurement of the static on-state resistance of a GaN-HEMT. Furthermore, it quantifies the dynamic on-state resistance by measurement with a novel clamping circuit using a digitizer card with high resolution. Based on these results, it presents an easy to implement method for calculating conduction losses in the presence of dynamic on-state resistance.

   Medium voltage power switch based on 1.7 kV SiC MOSFETs connected in series inside power modules
By Przemyslaw TROCHIMIUK [View]
[Download]

Abstract: This paper presents various issues related to a medium voltage power switch designed with series-connected transistors of the 1700 V/300 A SiC MOSFET power module. The focus of the paper are the voltage imbalance compensation methods: passive snubber circuits and active gate driving. Both methods are simulated in Saber software with the use of detailed models of the transistors and diodes of the module. At first, elements of the DRC snubber were determined and simulated during the double pulse procedure. Then, new active gate driver is proposed and verified via series of simulations. Finally, the test setup was designed with two series connected SiC MOSFETs inside CAS300M17BM2 power modules and experimental tests were performed at 1.5 kV DC to compare two compensation methods.

   Modelling of Power Losses for Switching State Model Simulations in SiC Power Converters with Calorimetric Verification
By Andri LOOSER [View]
[Download]

Abstract: Due to high switching speed of SiC MOSFET, the possibilities for determining the losses by directmeasurement methods are difficult. This article describes the modeling of losses based on datasheetvalues and by considering the actual operation point. By classifying the typical switching processes,the losses are determined with a simple case based and efficient state model simulation, where thelosses are considered at once by an analytical and lock up table based approach. This leads to a fastersimulation compared to a complete behavioral model where the switching is continuously simulated.The results are verified by calorimetric measurements and show a remarkable convergence.

   Nanosecond switching of ohmic loads using SiC MOSFETs in ultra-low inductive PCB-packages
By Raffael RISCH [View]
[Download]

Abstract: In pulsed power systems, nanosecond switching transients are required to meet the demanding pulsespecifications of voltage rise and fall times. To achieve these fast transients, SiC MOSFETs are promising semiconductor devices due to their high intrinsic switching speed. However, the parasitics of the semiconductor chip, the package and the board layout limit the achievable switching times. So far, no low inductive designs have been used to investigate the switching speed limits of SiC MOSFETs in pulsed power applications. Therefore, this paper focuses on the limits of the output voltage switching speed of a chopper type half bridge with an ohmic load, which is the fundamental switching cell of many solid-state pulse generators. The modelling of the half bridge is described and a linearized analytical model is presented for calculating the output voltage switching speed. For verification of the theoretical analysis, a sandwiched power module is built using a SiC MOSFET in a low inductive PCB-package.

   RC Snubber Design Procedure for Enhanced Oscillation Damping in Wide-Bandgap Switching Cells
By Niklas FRITZ [View]
[Download]

Abstract: This paper introduces an effortless design procedure for resistive-capacitive (RC) snubbers, aiming todamp the oscillations caused by wide-bandgap (WBG) power semiconductor devices in power electronic switching cells. Not only do overvoltages stress the semiconductor devices, the oscillations may also raise electromagnetic compatibility (EMC) issues. Although RC snubbers are popular as damping elements, most existing design strategies are very complex. In this paper, a simple analytical design approach is derived. The resulting closed-form expressions for the snubber parameters ensure maximum damping and enable a well-founded design in very little time. To validate the approach, double-pulse measurements are conducted on a printed circuit board (PCB) with an RC-snubbered WBG switching cell. The experimental results are in good agreement with the theoretical findings.

   Short-circuit robustness of parallel SiC MOSFETs and fail-safe mode strategy
By Francois BOIGE [View]
[Download]

Abstract: Silicon carbide (SiC) power MOSFETs exhibit some key differences compared with Silicon (Si) MOSFETs and IGBTs. In particular, both their intrinsic (i.e., material technology related) and extrinsic (i.e., device generation related) features-set implies, on the one hand, higher stress levels of the single chip during a short-circuit and, on the other hand, a greater spread in the value of some of the main electro-thermal parameters affecting the transistor performance during this stressful transient event. Thus, this paper proposes a thorough experimental analysis of the short-circuit robustness of parallel connected SiC Power MOSFETs, taking into account the actual distribution in their parameters. The overall aim is twofold: producing de-rating guidelines for multi-chip structures and developing validated strategies for ensuring new and original soft-fail (or fail-safe) modalities in the application, as a result of both single and repetitive pulse degradation.

   SiC Diode Characterization using Pulsed S-Parameter Measurements
By Martin HERGT [View]
[Download]

Abstract: Considering to power converter systems, the characterization and modeling of wide band gap semiconductors at switching frequencies in the MHz area are very important. In the following a method is presented in order to characterize and build up a non-linear model for a diode at frequencies up to 500 MHz.

   Simulations and Measurement Analysis of SiC MOSFET and IGBT Gate Drive Performance in Power Modules for More Electric Aircraft Motor Drive Applications
By Shane O'DONNELL [View]
[Download]

Abstract: With the increase in power electronic solutions for More Electric Aircraft, silicon-carbide MOSFETs are being considered as alternatives to silicon IGBTs in areas such as motor drive systems for primary flight and landing gear actuators. In these high-reliability applications, it's essential that all aspects of the power electronics, including the semiconductor switches, are well understood to ensure correct operation for extended periods. A study on the gate-drive signals of 1200 V SiC MOSFETs in two different prototype power module solutions designed for More Electric Aircraft motor drive applications is presented in this paper. Measurements are recorded for various MOSFET solutions and compared with an IGBT alternative. Furthermore, a dV/dt analysis is presented and the correlation between the gate-drive signals and the dV/dt is shown. Simulation results are validated with test bench measurements and methods for performance improvements are outlined. The data illustrates that the higher switching speed of the SiC devices results in increased transients and higher dV/dt which can impact negatively on the reliability of the system. One method of reducing these effects is by variation of the gate resistance but this may have a negative impact on power dissipation and inverter efficiency as presented in this study.

   Switching Modeling of Power Devices Turn-Off in a SiC Mosfets-based Inverter Leg
By Luciano SALVO [View]
[Download]

Abstract: The aim of this paper is to provide an analytical model of the power devices turn-off in a Silicon Carbide (SiC) MOSFETs-based inverter leg. In the proposed modeling approach, different methods have been evaluated to characterize the transconductance profiles, which play a key role in the switching behavior of the power devices. The proposed modeling method represents a good compromise between computational efforts and accuracy. The last has been evaluated by comparing simulation results with experimental tests, under different operating conditions.

   Thermal measurement of dissipated power for Gallium Nitride Gate Injection Transistors
By Leszek WYDZGOWSKI [View]
[Download]

Abstract: In this paper, a novel thermal measurement of power dissipation for Gallium Nitride (GaN) Gate InjectionTransistors (GITs) is presented. The novelty of this approach lies in utilization of a reverse conducting operation mode of power devices to determine the dependency between the dissipated power and a stable temperature of transistors. Power dissipation of a prototype DC-DC power converter has been investigated for various scenarios by using the proposed thermal method.

   Threshold for Induction Motor Terminal Transient Peak Voltage with Fast Switching Inverters
By Martin LINDAHL [View]
[Download]

Abstract: Concerns have been raised that motor voltages might be very high if the fast switching characteristics of silicon carbide (SiC) are to be utilized. For this reason, the magnitude of the terminal voltage of an induction motor is investigated when fed from a fast switching SiC inverter through a long cable. It is found that the main insulation demand for the SiC case is only increased by 5 \% compared to the silicon insulated-gate bipolar transistor (IGBT) case. This indicates that additional _lters may not be necessary in applications with long cables where silicon IGBTs are replaced by fast switching SiC power semiconductors.

EPE 2019 - DS1b: Active Devices and Components (Wide Bandgap and Other New Materials)
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2019 ECCE Europe - Conference > EPE 2019 - Topic 01: Devices, Packaging and System Integration > EPE 2019 - DS1b: Active Devices and Components (Wide Bandgap and Other New Materials)
	[return to parent folder]

	A New Method for Measuring Parasitics of Super Junction Power MOSFETs By Michael FUCHS	[View] [Download]
Abstract: This document proposes a new methodology to measure the voltage-dependent behavior of parasitic capacitances of super junction power MOSFETs. The measurement technique allows to extract all parasitic elements (capacitances and inductances) with only one measurement while a variable DC voltage is applied between the drain and source pin of the super junction MOSFET. The results can be used to create simulation models of MOSFETs and possibly complete power modules, that accurately represent their high frequency behavior to solve electromagnetic compatibility (EMC) problems in transient simulators, such as LTspice.

	A New SiC Power MOSFET Model With a Parameter Optimization Procedure By Ali ALHOUSSEIN	[View] [Download]
Abstract: In this paper, a characterization and comparison of SPICE models developed by two leading manufacturers of SiC power MOSFETs is carried out. A new SiC power MOSFET model is proposed which combines different aspects of the two manufacturers' models. A fitting algorithm is developed and then used to adjust the new model's parameters to performance data of SiC power MOSFETs.

	An application of Open-Loop Active Gate Voltage Control for GaN Transistors By Mamadou Lamine BEYE	[View] [Download]
Abstract: This paper presents the feasibility of an open-loop control of Active Gate Voltage Control (AGVC) during turn-on and turn-off of GaN HEMTs in order to reduce the current or voltage switching speed. For the turn-on, two parameters (Vint, Tint) are used to reduce the current transient speed while for the turn-off three parameters (T0, Vint0, Tint0) are used to adjust the voltage transient speed. The results show that the GaN HEMT can be controlled by the AGVC. However this technique is limited by the response time of the commercial gate drivers.

	An Improved SPICE Model for a 1.2-kV, 36-A Discrete Silicon-Carbide MOSFET With Higher Accuracy for a Wide Range of Drain Currents By Yasushige MUKUNOKI	[View] [Download]
Abstract: This paper describes higher accuracy of an improved SPICE model for a wide range of drain currents for a 1.2-kV, 36-A discrete SiC-MOSFET. The improved SPICE model is developed on the basis of our former Simplorer model by introducing new SPICE codes. Its accuracy and computational stability are validated by comparing the simulated switching waveforms with measurement and that from the manufacture's model up to the drain current of 30 A.

	Analysis of a 1200 V SiC-Si-Hybrid Switch for Resonant Applications with Consideration of Bipolar Desaturation By Michael MEISSNER	[View] [Download]
Abstract: Hybrid switches consisting of a silicon carbide MOSFET and a silicon IGBT are a promising approachfor power loss reduction in resonant topologies. Potentials and performance are analysed and discussedwith consideration of desaturation of the IGBT.

	Asymmetric Half-Bridge Configurations in Power Electronics Converters By Leon FAUTH	[View] [Download]
Abstract: The half bridge is the smallest common element of most converter topologies. While these half bridges are conventionally made from identical semiconductor switches, performance can be optimized by combining different switches. In this paper, asymmetrical half bridges will be introduced and categorized, an example circuit will be proposed.

	Impact of blanking time on switching losses in a SiC MOSFET-based converter using capacitive snubbers By Diane-Perle SADIK	[View] [Download]
Abstract: Wide Bandgap power semiconductors such as SiC MOSFETs, have enabled compact and highly efficient power converters operated at higher frequencies. In converters using SiC MOSFETs and capacitive snubbers, the blanking times may have a significant impact on switching losses. The power losses induced by unnecessary long blanking times have been quantified experimentally. It was found that, at 100 kHz, an adaptive blanking time can reduce the losses by more than 20 \%. As those losses are directly proportional to the switching frequency, an adaptive blanking time is essential when designing for high operation frequencies. Doing so, higher operation frequencies are possible while maintaining a high efficiency.

	Influence of chip parameters spread on power loss sharing of paralleled SiC MOSFETs By Peng SUN	[View] [Download]
Abstract: This paper focuses on the influence of chip parameters spread on power loss sharing of paralleled SiC MOSFETs. A simulation model of paralleled SiC MOSFETs under switching test is developed foranalyzing the relationship between power loss distribution and chip parameter spread. Thecorresponding physical testbench is built for experimental verification. The spread of different chipparameters, including transfer curve, on-state resistance, internal gate resistance, gate-sourcecapacitance, gate-drain capacitance, drain-source capacitance, from a sample of 30 SiC MOSFETdiscrete devices were tested. The power loss distribution among the paralleled devices was analyzed under different equivalent switching frequencies. The experimental and simulating results show that transfer curve and on-state resistance are the main parameters that affect power loss sharing. Moreover, the influence of different parameters on power loss can be compensated to reduce the power loss unbalance under different switching frequency.

	Integrated GaN ICs, development and performance By Dominique BERGOGNE	[View] [Download]
Abstract: This paper explores the possibility to achieve an integrated circuit with GaN transistors for power electronics applications. GaN provides only N type transistors. Power transistors are presented with the layout and standard useful characterization results at wafer level and chip level. A gate driver is shown, layout and performance, it demonstrates the difficulty to obtain fast rising edges using only type N type transistors. Another key function for integrated circuit is the level shifter, here a circuit capable of shifting a logic level up above the common rail of an inverter leg switching up to 400V at 1MHz. Finally, an integrated inverter leg is presented and tested switching 400V at 1MHz under 3A.

	Investigation of the Effect of Parasitic Inductances on the Current Balancing of Parallel-Connected Discrete SiC JFETs By Xiaoqing SONG	[View] [Download]
Abstract: SiC JFETs demonstrate quite a few unique properties like low specific on-resistance, high temperature operation potential benefiting from the simple physical structure, and normally-on characteristics, making it quite attractive for applications like solid-state circuit breakers. However, the parallel operation of the SiC JFETs is not as well documented as that of SiC MOSFETs or Si IGBTs. This paper investigates the parallel operation of the SiC JFETs and the effects of drain, source parasitic inductances of the discrete SiC JFET on the current sharing during parallel operation. The impact of parasitic inductances on current sharing for the parallel connected SiC JFETs are experimentally validated and analyzed. Further, methods to mitigate such unbalanced current sharing is proposed.

	Measuring and Modeling of Dynamic On-State Resistance of GaN-HEMTs By Benedikt KOHLHEPP	[View] [Download]
Abstract: GaN-HEMTs as switching devices impress with their very good properties and gain therefore a lot ofattention from the power electronics community. However, some GaN devices may exhibit increasedresistance during on-state due to charge trapping effects. As for designers of switch mode power supplies the internal structure of devices is concealed, measurements are the only way to gain information. This paper shows the measurement of the static on-state resistance of a GaN-HEMT. Furthermore, it quantifies the dynamic on-state resistance by measurement with a novel clamping circuit using a digitizer card with high resolution. Based on these results, it presents an easy to implement method for calculating conduction losses in the presence of dynamic on-state resistance.

	Medium voltage power switch based on 1.7 kV SiC MOSFETs connected in series inside power modules By Przemyslaw TROCHIMIUK	[View] [Download]
Abstract: This paper presents various issues related to a medium voltage power switch designed with series-connected transistors of the 1700 V/300 A SiC MOSFET power module. The focus of the paper are the voltage imbalance compensation methods: passive snubber circuits and active gate driving. Both methods are simulated in Saber software with the use of detailed models of the transistors and diodes of the module. At first, elements of the DRC snubber were determined and simulated during the double pulse procedure. Then, new active gate driver is proposed and verified via series of simulations. Finally, the test setup was designed with two series connected SiC MOSFETs inside CAS300M17BM2 power modules and experimental tests were performed at 1.5 kV DC to compare two compensation methods.

	Modelling of Power Losses for Switching State Model Simulations in SiC Power Converters with Calorimetric Verification By Andri LOOSER	[View] [Download]
Abstract: Due to high switching speed of SiC MOSFET, the possibilities for determining the losses by directmeasurement methods are difficult. This article describes the modeling of losses based on datasheetvalues and by considering the actual operation point. By classifying the typical switching processes,the losses are determined with a simple case based and efficient state model simulation, where thelosses are considered at once by an analytical and lock up table based approach. This leads to a fastersimulation compared to a complete behavioral model where the switching is continuously simulated.The results are verified by calorimetric measurements and show a remarkable convergence.

	Nanosecond switching of ohmic loads using SiC MOSFETs in ultra-low inductive PCB-packages By Raffael RISCH	[View] [Download]
Abstract: In pulsed power systems, nanosecond switching transients are required to meet the demanding pulsespecifications of voltage rise and fall times. To achieve these fast transients, SiC MOSFETs are promising semiconductor devices due to their high intrinsic switching speed. However, the parasitics of the semiconductor chip, the package and the board layout limit the achievable switching times. So far, no low inductive designs have been used to investigate the switching speed limits of SiC MOSFETs in pulsed power applications. Therefore, this paper focuses on the limits of the output voltage switching speed of a chopper type half bridge with an ohmic load, which is the fundamental switching cell of many solid-state pulse generators. The modelling of the half bridge is described and a linearized analytical model is presented for calculating the output voltage switching speed. For verification of the theoretical analysis, a sandwiched power module is built using a SiC MOSFET in a low inductive PCB-package.

	RC Snubber Design Procedure for Enhanced Oscillation Damping in Wide-Bandgap Switching Cells By Niklas FRITZ	[View] [Download]
Abstract: This paper introduces an effortless design procedure for resistive-capacitive (RC) snubbers, aiming todamp the oscillations caused by wide-bandgap (WBG) power semiconductor devices in power electronic switching cells. Not only do overvoltages stress the semiconductor devices, the oscillations may also raise electromagnetic compatibility (EMC) issues. Although RC snubbers are popular as damping elements, most existing design strategies are very complex. In this paper, a simple analytical design approach is derived. The resulting closed-form expressions for the snubber parameters ensure maximum damping and enable a well-founded design in very little time. To validate the approach, double-pulse measurements are conducted on a printed circuit board (PCB) with an RC-snubbered WBG switching cell. The experimental results are in good agreement with the theoretical findings.

	Short-circuit robustness of parallel SiC MOSFETs and fail-safe mode strategy By Francois BOIGE	[View] [Download]
Abstract: Silicon carbide (SiC) power MOSFETs exhibit some key differences compared with Silicon (Si) MOSFETs and IGBTs. In particular, both their intrinsic (i.e., material technology related) and extrinsic (i.e., device generation related) features-set implies, on the one hand, higher stress levels of the single chip during a short-circuit and, on the other hand, a greater spread in the value of some of the main electro-thermal parameters affecting the transistor performance during this stressful transient event. Thus, this paper proposes a thorough experimental analysis of the short-circuit robustness of parallel connected SiC Power MOSFETs, taking into account the actual distribution in their parameters. The overall aim is twofold: producing de-rating guidelines for multi-chip structures and developing validated strategies for ensuring new and original soft-fail (or fail-safe) modalities in the application, as a result of both single and repetitive pulse degradation.

	SiC Diode Characterization using Pulsed S-Parameter Measurements By Martin HERGT	[View] [Download]
Abstract: Considering to power converter systems, the characterization and modeling of wide band gap semiconductors at switching frequencies in the MHz area are very important. In the following a method is presented in order to characterize and build up a non-linear model for a diode at frequencies up to 500 MHz.

	Simulations and Measurement Analysis of SiC MOSFET and IGBT Gate Drive Performance in Power Modules for More Electric Aircraft Motor Drive Applications By Shane O'DONNELL	[View] [Download]
Abstract: With the increase in power electronic solutions for More Electric Aircraft, silicon-carbide MOSFETs are being considered as alternatives to silicon IGBTs in areas such as motor drive systems for primary flight and landing gear actuators. In these high-reliability applications, it's essential that all aspects of the power electronics, including the semiconductor switches, are well understood to ensure correct operation for extended periods. A study on the gate-drive signals of 1200 V SiC MOSFETs in two different prototype power module solutions designed for More Electric Aircraft motor drive applications is presented in this paper. Measurements are recorded for various MOSFET solutions and compared with an IGBT alternative. Furthermore, a dV/dt analysis is presented and the correlation between the gate-drive signals and the dV/dt is shown. Simulation results are validated with test bench measurements and methods for performance improvements are outlined. The data illustrates that the higher switching speed of the SiC devices results in increased transients and higher dV/dt which can impact negatively on the reliability of the system. One method of reducing these effects is by variation of the gate resistance but this may have a negative impact on power dissipation and inverter efficiency as presented in this study.

	Switching Modeling of Power Devices Turn-Off in a SiC Mosfets-based Inverter Leg By Luciano SALVO	[View] [Download]
Abstract: The aim of this paper is to provide an analytical model of the power devices turn-off in a Silicon Carbide (SiC) MOSFETs-based inverter leg. In the proposed modeling approach, different methods have been evaluated to characterize the transconductance profiles, which play a key role in the switching behavior of the power devices. The proposed modeling method represents a good compromise between computational efforts and accuracy. The last has been evaluated by comparing simulation results with experimental tests, under different operating conditions.

	Thermal measurement of dissipated power for Gallium Nitride Gate Injection Transistors By Leszek WYDZGOWSKI	[View] [Download]
Abstract: In this paper, a novel thermal measurement of power dissipation for Gallium Nitride (GaN) Gate InjectionTransistors (GITs) is presented. The novelty of this approach lies in utilization of a reverse conducting operation mode of power devices to determine the dependency between the dissipated power and a stable temperature of transistors. Power dissipation of a prototype DC-DC power converter has been investigated for various scenarios by using the proposed thermal method.

	Threshold for Induction Motor Terminal Transient Peak Voltage with Fast Switching Inverters By Martin LINDAHL	[View] [Download]
Abstract: Concerns have been raised that motor voltages might be very high if the fast switching characteristics of silicon carbide (SiC) are to be utilized. For this reason, the magnitude of the terminal voltage of an induction motor is investigated when fed from a fast switching SiC inverter through a long cable. It is found that the main insulation demand for the SiC case is only increased by 5 \% compared to the silicon insulated-gate bipolar transistor (IGBT) case. This indicates that additional _lters may not be necessary in applications with long cables where silicon IGBTs are replaced by fast switching SiC power semiconductors.