EPE Association: EPE 2015 - DS2b: New Materials and Active Devices

EPE 2015 - DS2b: New Materials and Active Devices
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2015 ECCE Europe - Conference > EPE 2015 - Topic 01: Devices, Packaging and System Integration > EPE 2015 - DS2b: New Materials and Active Devices

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   Behavioral Model of Gallium Nitride Normally ON Power HEMT Dedicated to Inverter Simulation and Test of Driving Strategies
By TimothÃ© Rossignol [View]
[Download]

Abstract: In this paper, the authors present a behavioral model of a GaN normally ON HEMT. Forward and reverse conductions are modelized. The modelling of both conduction modes is required to provide accurate diode-less synchronous switching-cell simulation. A dedicated transistor capacitance extraction procedure based on an analysis of turn-on and turn-off waveforms is also proposed and experimented.

   Comparison of power losses in 1700V Si IGBT and SiC MOSFET modules including reverse conduction
By Jacek RÄ…bkowski [View]
[Download]

Abstract: The paper presents a study of the power losses in 1700V rated half-bridge power modules applied in a 250kVA three-phase converter. Two types of the modules with comparable parameters (1700V/300A) are analyzed: the first one is based on Si IGBT and the second is built with SiC MOSFETs and Schottky diodes. A special focus of this paper is a reverse conduction of SiC MOSFETs. This phenomenon is analyzed by means of Saber simulations and new, corrected equations describing conduction power losses of the diodes and transistors are provided. Then, combined electro-thermal calculations are conducted using datasheet parameters of the compared modules. The collected data suggest that the Si IGBT module show lower conduction power losses while SiC MOSFETs provides much better switching performance. Thus, both modules are comparable at low switching frequencies but an advantage of the SiC MOSFET module is more visible with the switching frequency increase. When the three-phase converter is operating in an active rectifier mode the conduction power losses are strongly reduced due to the reverse conduction of SiC transistors. In consequence, the SiC MOSFET module shows lower conduction losses and total power losses than Si IGBT.

   Design Considerations and Laboratory Testing of Power Circuits for Parallel Operation of Silicon Carbide MOSFETs
By Subhadra TIWARI [View]
[Download]

Abstract: In this paper, the impact of using parallel SiC MOSFETs as the switching device is investigated. Mea-surement considerations for a double pulse test are discussed, and the influence of the load inductorcharacteristic and the voltage measurement technique on the measurement results is demonstrated. It isshown that the inductor load can produce high frequency oscillations of up to 10 \% of the load currentin the switching current, which can wrongly be associated with the switching device. It is also shownthat the standard earth connection of passive voltage probes can induce an extra stray inductance in themeasurement loop, which can lead to a measurement of an extra overvoltage of up to 50 V, which is notdue to the actual switching.Moreover, the dependency of turn-on and turn-off losses on the load current and the dc-link voltageis presented. It is shown that doubling the load current would increase the switching losses more than thedouble amount. Therefore, use of two parallel MOSFETs instead of a single one would decrease the totalswitching losses for a given load current. On the other hand, the parallel configuration is shown to havea higher overvoltage than one single MOSFET for a similar load current. This, however, can be reducedby a higher gate resistance which will eventually keep the total switching loss of parallel configurationequal to the single MOSFET configuration for a given load current.Finally, it is also shown that switching losses can be greatly decreased by decreasing the gate resis-tance, but this leads to a higher overvoltage on the device. Therefore, the final choice for design is acompromise between the switching losses and the overvoltage.

   Electrical performances and reliability of commercial SiC MOSFETs at high temperature and in SC conditions
By Maxime BERTHOU [View]
[Download]

Abstract: Commercial Silicon Carbide have been characterized under various configuration to assess theirmaturity and capability to replace their Silicon counterparts in 1.2kV converter applications. Static anddynamic characterization were performed between 80 and 525K. Reliability of the devices have beentested at high temperatures. Finally critical and repetitve short-circuit capability have been measured

   Experimental Analysis and Modeling of GaN Normally-off HFETs with Trapping Effects
By Jan BÃ¶cker [View]
[Download]

Abstract: A 70 mOhm / 600 V normally-off AlGaN/GaN HFET is analyzed and modeled. In particular, static and dynamic characteristics are investigated with the focus on modeling trapping effects and their influence on the on-state resistance and on the switching characteristic. Two methods to measure these trapping effects are compared, a clamped measurement of the on-state resistance and a measurement of a shift in the transfer characteristic. Both methods are suitable to extract time constants of trapping effects, which are required for the trap model. A comparison of the measurements demonstrates the link between the increased dynamic on-state resistance and the threshold voltage shift. The developed model is suitable to simulate the performance of the HFET during switching and conduction intervals.

   Finite Element Modelling and Experimental Characterisation of Paralleled SiC MOSFET Failure under Avalanche Mode Conduction
By JI HU [View]
[Download]

Abstract: This paper investigates the physics of device failure during avalanche mode conduction for SiCMOSFETs. SiC devices have been shown to have superior electro-thermal ruggedness duringunclamped inductive switching (UIS) compared with similarly rated silicon IGBTs [1]. Failureduring UIS normally results from parasitic BJT latch-up which is exacerbated at higher temperatures[2, 3]. Measurements show that the total avalanche energy conducted by the device improves when theUIS occurs over longer avalanche duration with a smaller peak avalanche current as opposed to ahigher peak avalanche current over a shorter duration. This is due to the fact that cell-to-cell (or die-todie)variations in electrical parameters are more critical during peak avalanche current conduction.Power MOSFETs are comprised to numerous FET cells internally connected to common source, drainand gate terminals and the density of which is determined by the cell pitch and die area. These FETcells are normally assumed to be uniform in electro-thermal properties, however, there are variationsin parameters like thermal resistance, gate resistance, oxide thickness, body doping, etc. Finite elementmodels of 2 FET cells within a MOSFET show how variations in gate resistance and thermalresistance (initial junction temperature) degrade the devices reliability under UIS and that this is morecritical for higher avalanche currents. The finite element models are supported by experimentalmeasurements designed to emulate the effect of inter-cell variation.

   Investigation of Deep Levels in SiC-Schottky Diodes with Frequency Resolved Admittance Spectroscopy
By Eric PERTERMANN [View]
[Download]

Abstract: To reduce power losses, power device technologies aim at a minimized chip thickness. Therefore, it becomes more and more important that the chips are as defect-free as possible und that a method is provided to detect defects which are detrimental for such devices. In this work we show, that with further improvement of the Frequency Resolved Admittance Spectroscopy (FRAS) technique a performance is achieved to investigate wide bandgap devices. We show that FRAS is in some respect an alternative to DLTS measurements allowing identification of deep traps (their energy levels and capture cross-sections) with reduced measurement effort. This is shown on the analysis of radiation defects (deep levels) introduced in n-type 4H-SiC commercially available 1700V Schottky diodes by high energy electron and proton irradiation. This comparative analysis was performed by both FRAS and DLTS methods.

   Investigation of long-term parameter variations of SiC power MOSFETs
By Diane-Perle SADIK [View]
[Download]

Abstract: Experimental investigations on the gate-oxide and body-diode reliability of commercially available Silicon Carbide (SiC) MOSFETs from the second generation are performed. The body-diode conduction test is performed with a current density of 50 A/cm2 in order to determine if the body-diode of the MOSFETs is free from bipolar degradation. The second test is stressing the gate-oxide. A negative bias is applied on the gate oxide in order to detect and quantify potential drifts.

   JBS Power-Rectifiers for 1.7 kV Applications with Conduction Properties Close to Pure Schottky-Design
By Holger BARTOLF [View]
[Download]

Abstract: This paper discusses an elaborated study about the design of Junction-Barrier Schottky (JBS)diodes regarding the width (w) and spacing (s) of the implanted p+ pattern, utilizing epitaxial drift-layer specifications (4H-SiC) suitable for 1.7 kV applications. The impact of the w/s design-ratio onthe blocking characteristics, the unipolar ON-state performance as well as moderation of surge currentevents are investigated. Finally, we report experimental results on successfully manufactured 1.7 kVJBS power-rectifiers demonstrating the practical validity of our numerical approach.

   Optimized Switching of a SiC MOSFET in a VSI using the Body Biode and additional Schottky Barrier Diode
By Roman HORFF [View]
[Download]

Abstract: In this paper the switching behaviour of SiC MOSFETs is regarded with respect to the influence of the free-wheeling diode. A double pulse test was performed using two silicon carbide Schottky barrier diodes (SBD) of different rated currents and the intrinsic body diode of a silicon carbide MOSFET. The switching losses of these three combinations are analysed to find the best combination of MOSFET and antiparallel diode for the application in a voltage source inverter (VSI). The body diode was found to dissipate not negligible switching losses.The effect of a silicon carbide Schottky barrier diode in high current SiC power modules is shown. Calculating the power capability, it is shown that the MOSFET inverter without SBD has the higher power density.

   Short-Circuit Evaluation and Overcurrent Protection for SiC Power MOSFETs
By Abdullah EIAL AWWAD [View]
[Download]

Abstract: In this paper, the short-circuit (SC) performance of two different SiC MOSFETs is experimentally investigated for different input voltages, biasing voltages and case temperatures. The measurement results are compared to simulations, and a good agreement is achieved. For fault handling, two different overcurrent protection (OCP) circuits are designed and applied to the SiC MOSFETs. The desaturation method is successfully tested with a hardware solution substituting the blanking time delay. The second method is based on sensing the voltage drop across the parasitic inductance at the source pin. The experimental and simulation results show that both OCP methods have the capability to detect a short circuit condition in the SiC MOSFET within safe SC time avoiding device failure.

   Temperature Effects on Performance of SiC Power Semiconductors (SiC JFET and SiC MOSFET)
By Ping ZHU [View]
[Download]

Abstract: Simulation models of SiC power transistors (normally on/ off SiC JFET, SiC MOSFET) are developed by means of data driven modeling with consideration of thermal effects. Temperature effects on electrical characteristics of SiC power devices are obtained from simulations and tests of static and dynamic characteristics, which solve the problem of no consideration on temperature effects when comparing between several commercial SiC power devices. It was found that different SiC transistors have their own advantages at stability of gate voltage, switching loss and so on. These analyses can be supplied to device selection and circuit design in specific application. Besides, simulation results coincide well with test results and transient junction temperature of SiC power transistors can be observed conveniently through simulation of thermoelectric coupling model. These models and simulation results could be used in applied research.

EPE 2015 - DS2b: New Materials and Active Devices
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2015 ECCE Europe - Conference > EPE 2015 - Topic 01: Devices, Packaging and System Integration > EPE 2015 - DS2b: New Materials and Active Devices
	[return to parent folder]

	Behavioral Model of Gallium Nitride Normally ON Power HEMT Dedicated to Inverter Simulation and Test of Driving Strategies By TimothÃ© Rossignol	[View] [Download]
Abstract: In this paper, the authors present a behavioral model of a GaN normally ON HEMT. Forward and reverse conductions are modelized. The modelling of both conduction modes is required to provide accurate diode-less synchronous switching-cell simulation. A dedicated transistor capacitance extraction procedure based on an analysis of turn-on and turn-off waveforms is also proposed and experimented.

	Comparison of power losses in 1700V Si IGBT and SiC MOSFET modules including reverse conduction By Jacek RÄ…bkowski	[View] [Download]
Abstract: The paper presents a study of the power losses in 1700V rated half-bridge power modules applied in a 250kVA three-phase converter. Two types of the modules with comparable parameters (1700V/300A) are analyzed: the first one is based on Si IGBT and the second is built with SiC MOSFETs and Schottky diodes. A special focus of this paper is a reverse conduction of SiC MOSFETs. This phenomenon is analyzed by means of Saber simulations and new, corrected equations describing conduction power losses of the diodes and transistors are provided. Then, combined electro-thermal calculations are conducted using datasheet parameters of the compared modules. The collected data suggest that the Si IGBT module show lower conduction power losses while SiC MOSFETs provides much better switching performance. Thus, both modules are comparable at low switching frequencies but an advantage of the SiC MOSFET module is more visible with the switching frequency increase. When the three-phase converter is operating in an active rectifier mode the conduction power losses are strongly reduced due to the reverse conduction of SiC transistors. In consequence, the SiC MOSFET module shows lower conduction losses and total power losses than Si IGBT.

	Design Considerations and Laboratory Testing of Power Circuits for Parallel Operation of Silicon Carbide MOSFETs By Subhadra TIWARI	[View] [Download]
Abstract: In this paper, the impact of using parallel SiC MOSFETs as the switching device is investigated. Mea-surement considerations for a double pulse test are discussed, and the influence of the load inductorcharacteristic and the voltage measurement technique on the measurement results is demonstrated. It isshown that the inductor load can produce high frequency oscillations of up to 10 \% of the load currentin the switching current, which can wrongly be associated with the switching device. It is also shownthat the standard earth connection of passive voltage probes can induce an extra stray inductance in themeasurement loop, which can lead to a measurement of an extra overvoltage of up to 50 V, which is notdue to the actual switching.Moreover, the dependency of turn-on and turn-off losses on the load current and the dc-link voltageis presented. It is shown that doubling the load current would increase the switching losses more than thedouble amount. Therefore, use of two parallel MOSFETs instead of a single one would decrease the totalswitching losses for a given load current. On the other hand, the parallel configuration is shown to havea higher overvoltage than one single MOSFET for a similar load current. This, however, can be reducedby a higher gate resistance which will eventually keep the total switching loss of parallel configurationequal to the single MOSFET configuration for a given load current.Finally, it is also shown that switching losses can be greatly decreased by decreasing the gate resis-tance, but this leads to a higher overvoltage on the device. Therefore, the final choice for design is acompromise between the switching losses and the overvoltage.

	Electrical performances and reliability of commercial SiC MOSFETs at high temperature and in SC conditions By Maxime BERTHOU	[View] [Download]
Abstract: Commercial Silicon Carbide have been characterized under various configuration to assess theirmaturity and capability to replace their Silicon counterparts in 1.2kV converter applications. Static anddynamic characterization were performed between 80 and 525K. Reliability of the devices have beentested at high temperatures. Finally critical and repetitve short-circuit capability have been measured

	Experimental Analysis and Modeling of GaN Normally-off HFETs with Trapping Effects By Jan BÃ¶cker	[View] [Download]
Abstract: A 70 mOhm / 600 V normally-off AlGaN/GaN HFET is analyzed and modeled. In particular, static and dynamic characteristics are investigated with the focus on modeling trapping effects and their influence on the on-state resistance and on the switching characteristic. Two methods to measure these trapping effects are compared, a clamped measurement of the on-state resistance and a measurement of a shift in the transfer characteristic. Both methods are suitable to extract time constants of trapping effects, which are required for the trap model. A comparison of the measurements demonstrates the link between the increased dynamic on-state resistance and the threshold voltage shift. The developed model is suitable to simulate the performance of the HFET during switching and conduction intervals.

	Finite Element Modelling and Experimental Characterisation of Paralleled SiC MOSFET Failure under Avalanche Mode Conduction By JI HU	[View] [Download]
Abstract: This paper investigates the physics of device failure during avalanche mode conduction for SiCMOSFETs. SiC devices have been shown to have superior electro-thermal ruggedness duringunclamped inductive switching (UIS) compared with similarly rated silicon IGBTs [1]. Failureduring UIS normally results from parasitic BJT latch-up which is exacerbated at higher temperatures[2, 3]. Measurements show that the total avalanche energy conducted by the device improves when theUIS occurs over longer avalanche duration with a smaller peak avalanche current as opposed to ahigher peak avalanche current over a shorter duration. This is due to the fact that cell-to-cell (or die-todie)variations in electrical parameters are more critical during peak avalanche current conduction.Power MOSFETs are comprised to numerous FET cells internally connected to common source, drainand gate terminals and the density of which is determined by the cell pitch and die area. These FETcells are normally assumed to be uniform in electro-thermal properties, however, there are variationsin parameters like thermal resistance, gate resistance, oxide thickness, body doping, etc. Finite elementmodels of 2 FET cells within a MOSFET show how variations in gate resistance and thermalresistance (initial junction temperature) degrade the devices reliability under UIS and that this is morecritical for higher avalanche currents. The finite element models are supported by experimentalmeasurements designed to emulate the effect of inter-cell variation.

	Investigation of Deep Levels in SiC-Schottky Diodes with Frequency Resolved Admittance Spectroscopy By Eric PERTERMANN	[View] [Download]
Abstract: To reduce power losses, power device technologies aim at a minimized chip thickness. Therefore, it becomes more and more important that the chips are as defect-free as possible und that a method is provided to detect defects which are detrimental for such devices. In this work we show, that with further improvement of the Frequency Resolved Admittance Spectroscopy (FRAS) technique a performance is achieved to investigate wide bandgap devices. We show that FRAS is in some respect an alternative to DLTS measurements allowing identification of deep traps (their energy levels and capture cross-sections) with reduced measurement effort. This is shown on the analysis of radiation defects (deep levels) introduced in n-type 4H-SiC commercially available 1700V Schottky diodes by high energy electron and proton irradiation. This comparative analysis was performed by both FRAS and DLTS methods.

	Investigation of long-term parameter variations of SiC power MOSFETs By Diane-Perle SADIK	[View] [Download]
Abstract: Experimental investigations on the gate-oxide and body-diode reliability of commercially available Silicon Carbide (SiC) MOSFETs from the second generation are performed. The body-diode conduction test is performed with a current density of 50 A/cm2 in order to determine if the body-diode of the MOSFETs is free from bipolar degradation. The second test is stressing the gate-oxide. A negative bias is applied on the gate oxide in order to detect and quantify potential drifts.

	JBS Power-Rectifiers for 1.7 kV Applications with Conduction Properties Close to Pure Schottky-Design By Holger BARTOLF	[View] [Download]
Abstract: This paper discusses an elaborated study about the design of Junction-Barrier Schottky (JBS)diodes regarding the width (w) and spacing (s) of the implanted p+ pattern, utilizing epitaxial drift-layer specifications (4H-SiC) suitable for 1.7 kV applications. The impact of the w/s design-ratio onthe blocking characteristics, the unipolar ON-state performance as well as moderation of surge currentevents are investigated. Finally, we report experimental results on successfully manufactured 1.7 kVJBS power-rectifiers demonstrating the practical validity of our numerical approach.

	Optimized Switching of a SiC MOSFET in a VSI using the Body Biode and additional Schottky Barrier Diode By Roman HORFF	[View] [Download]
Abstract: In this paper the switching behaviour of SiC MOSFETs is regarded with respect to the influence of the free-wheeling diode. A double pulse test was performed using two silicon carbide Schottky barrier diodes (SBD) of different rated currents and the intrinsic body diode of a silicon carbide MOSFET. The switching losses of these three combinations are analysed to find the best combination of MOSFET and antiparallel diode for the application in a voltage source inverter (VSI). The body diode was found to dissipate not negligible switching losses.The effect of a silicon carbide Schottky barrier diode in high current SiC power modules is shown. Calculating the power capability, it is shown that the MOSFET inverter without SBD has the higher power density.

	Short-Circuit Evaluation and Overcurrent Protection for SiC Power MOSFETs By Abdullah EIAL AWWAD	[View] [Download]
Abstract: In this paper, the short-circuit (SC) performance of two different SiC MOSFETs is experimentally investigated for different input voltages, biasing voltages and case temperatures. The measurement results are compared to simulations, and a good agreement is achieved. For fault handling, two different overcurrent protection (OCP) circuits are designed and applied to the SiC MOSFETs. The desaturation method is successfully tested with a hardware solution substituting the blanking time delay. The second method is based on sensing the voltage drop across the parasitic inductance at the source pin. The experimental and simulation results show that both OCP methods have the capability to detect a short circuit condition in the SiC MOSFET within safe SC time avoiding device failure.

	Temperature Effects on Performance of SiC Power Semiconductors (SiC JFET and SiC MOSFET) By Ping ZHU	[View] [Download]
Abstract: Simulation models of SiC power transistors (normally on/ off SiC JFET, SiC MOSFET) are developed by means of data driven modeling with consideration of thermal effects. Temperature effects on electrical characteristics of SiC power devices are obtained from simulations and tests of static and dynamic characteristics, which solve the problem of no consideration on temperature effects when comparing between several commercial SiC power devices. It was found that different SiC transistors have their own advantages at stability of gate voltage, switching loss and so on. These analyses can be supplied to device selection and circuit design in specific application. Besides, simulation results coincide well with test results and transient junction temperature of SiC power transistors can be observed conveniently through simulation of thermoelectric coupling model. These models and simulation results could be used in applied research.