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 EPE 2019 - DS2b: System Integration, Packaging & Thermal Management 
 You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2019 ECCE Europe - Conference > EPE 2019 - Topic 01: Devices, Packaging and System Integration > EPE 2019 - DS2b: System Integration, Packaging & Thermal Management 
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   Comparison of Zth measurement of direct oil dual cooled power modules and water cooled modules 
 By Peter SEIDEL 
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Abstract: Typically, power modules are mounted directly on a heat sink and either air or water cooled,therefore the main heat dissipation path is via the baseplate. New semiconductor materials areemerging which allow higher blocking voltages and thus make the housing assembly to agreater challenge. For these reasons, the idea of direct oil cooling and thus the replacement ofsilicone encapsulation is taken up again. A comparison between oil cooling and water coolingat measurement of the thermal impedance Zth is presented.

 
   Design and Parameter Sensitivity Analysis of a Heatsink for a Direct Cooled Power Module with a Ribbon Bonded Cooling Structure 
 By Artem RODIONOV 
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Abstract: This paper investigates the sensitivity of heatsink design parameters for a novel type of ribbon-bonded direct cooled power module for automotive applications. Multi-parameter analysis of the heatsink geometry is performed with thermally coupled computational fluid dynamic simulations with respect to thermal and fluid performance. The fluid dynamic simulations show that the outlet pressure drop is the most dominant pressure drop of all considered geometries, while the pressure drop due to the ribbon bonded cooling structure of the power module is comparatively low. The thermally coupled simulations of the ribbon bonded cooling structure show that when maximum rated heat flux from the power module is applied, the coolant temperature increases along the cooling channel is in the worst investigated case as high as 36 degrees over the module. This leads to an uneven thermal load of the module, where the downstream power switches become the bottleneck. A method to estimate the amount of loss that can be safely dissipated by taking the coolant inlet temperature, flow rate and thermal gradient into account is proposed.

 
   Electromagnetic disturbance of thermal measurements with the Vce(T)-method in power modules 
 By Uwe SCHILLING 
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Abstract: This paper reports that the measurement of the thermal impedance of a power module via the Vce(T)-method is influenced by eddy currents in metal layers below the isolating ceramic. This influence is exemplified with measurements on a standard baseplate module. In these measurements, the apparent chip temperature evolution differs significantly if measured either at the auxiliary terminals or the main terminals. Experiments and simulations show good agreement and conclusively identify electromagnetic induction as origin of this difference. Finally, options to reduce the contribution of this effect to the measurement signal are discussed.This paper reports that the measurement of the thermal impedance of a power module via the Vce(T)-method is influenced by eddy currents in metal layers below the isolating ceramic. This influence is exemplified with measurements on a standard baseplate module. In these measurements, the apparent chip temperature evolution differs significantly if measured either at the auxiliary terminals or the main terminals. Experiments and simulations show good agreement and conclusively identify electromagnetic induction as origin of this difference. Finally, options to reduce the contribution of this effect to the measurement signal are discussed.

 
   Evaluation of electrical and thermal properties of single crystalline diamond with large area of 18 mm×18 mm for power module 
 By Kunio KOSEKI 
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Abstract: Diamond substrate was evaluated from the viewpoint of voltage withstand and thermal performance. High voltage of up to 30 kV was successfully applied without electrical breakdown to thin substrate of 300 _m. Superior thermal performance of 0.95 K/W compared to conventional materials (silicon nitride and aluminum nitride) was also measured with a single-crystalline mosaic diamond substrate with large area of 18 mm×18 mm.

 
   Multi-Step Packaging Concept for Series-Connected SiC MOSFETs 
 By Luciano ALVES 
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Abstract: This paper presents a Multi-Step Packaging (MSP) concept for optimizing implementation of series-connected SiC-MOSFETs devices. The proposed package geometry considers optimal dielectric isolation for each device leading to a stairs like a multi-step geometry. It has a significant impact on the parasitic capacitances introduced by the packaging structure that are responsible for voltage unbalances. The concept is introduced and analyzed thanks to equivalent models and time domain simulations. Then, experimental results confirm that the proposed packaging concept is better than traditional 2D planar power modules in terms of voltage balancing. Furthermore, the proposed concept can improve the switching speed of the switching cell as explained and shown in this paper.

 
   Optimized Design of Chips Layout in Press-Pack IGBT Module 
 By Lin LIANG 
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Abstract: To analyze the influence of chips layout in Press-Pack IGBT modules, the current sharing, stress and temperature distribution of two types of modules with anti-parallel diodes are simulated. The results show that the case of IGBTs evenly surrounding around the diodes ensures a better current sharing, stress and temperature distribution over a wide current range. Furthermore, the current sharing of customized Press-Pack IGBT module with two layouts is measured by PCB Rogowski coils. The results of measurement verified the simulation results in terms of current sharing.

 
   Power module platform for automotive reliability requirements 
 By Niko PAVLICEK 
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Abstract: This paper presents the design and reliability assessments of a novel power semiconductor module platform for the automotive powertrain. Solder-free interconnects enable superior reliability meeting future automotive requirements. Modules with heavy Cu wire bonding on sintered top plates show a strongly improved power cycling lifetime compared to standard Al wire bonding. However, new failure modes are observed for the fully sintered devices.

 
   Proof-of-Concept for a Kelvin-Emitter On-Chip Temperature Sensor for Power Semiconductors 
 By Nick BAKER 
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Abstract: This paper presents the use of a kelvin-emitter resistor as a junction temperature sensor in IGBTs. The kelvin-emitter resistor is placed directly on the IGBT die surface. The resistance is then evaluated using a sensing current injected between the power-emitter and kelvin-emitter terminals. The kelvin-emitter resistor is part of the overall gate resistance of the IGBT. Due to the resistor design, the temperature measured is a local temperature that correlates with the top of the resistor.

 
   RC-IGBT power module for xEV powertrain with fast and accurate on-chip temperature sensors 
 By Akihiro OSAWA 
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Abstract: This paper describes the advantage of using reverse conducting-IGBT(RC-IGBT) with on-chip temperature sensor. It is possible to detect temperature of not only IGBT area but also FWD area. Additionally, simulated maximum current for the RC-IGBT with on-chip temperature sensor was approximately 13\% higher than an IGBT module with negative temperature coefficient(NTC) thermistor.

 
   Thermal modelling of a multichip IGBT power module 
 By Chengjun TANG 
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Abstract: Life time prediction and thermal management are among the key issues regarding the performance of today's semiconductor devices. And a fast and accurate thermal model can be used to tackle those problems more efficiently. In this paper, different thermal models of an IGBT power module have been established and compared. Firstly, a 3D finite element method (FEM) model is simulated in COMSOL. And then, a lumped parameter thermal model with considering different aspects (heat spreading and thermal coupling) is derived. The simulation indicates that the proposed model can achieve a relatively accurate result within a short simulation time.

 
   Thermal Stress Reduction and Lifetime Improvement of Power Switches with Dynamic Gate Driving Strategy 
 By Lie WANG 
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Abstract: The thermal stress and lifetime of semiconductor power switches are largely determined by thermalcycling. Considerable thermal stress and reduced lifetime problems occur especially at low frequencyoperation. In this paper, an analytical model and the equivalent circuit model of power MOSFETs arederived to investigate their thermal behavior. After that, a dynamic gate driver that supplies an adjustable gate voltage is proposed to shape the power losses, thus mitigate thermal stress for lifetime improvement. Finally, the resulting semiconductor lifetime is estimated, which shows an improvement by a factor of two after applying the proposed strategy.

 
   Ultra-fast voltage clamping for fast power-semiconductor modules 
 By Jan FUHRMANN 
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Abstract: The fast switching of 1200/1700-V semiconductors, like silicon carbide MOSFET or optimized IGBTs, is often limited by the parasitic inductance due to overvoltages during switching. To utilize the full switching speed a very low-inductive package or a very fast overvoltage limitation is necessary. Withinthis paper, an ultra-fast voltage clamping is presented which is placed as close as possible to the switching devices.