Please enter the words you want to search for:

 EPE 2009 - Subtopic 01-7 - DS: 'Power Device Models, Drive and Protection' 
 You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2009 - Conference > EPE 2009 - Topic 01: 'Active Devices' > EPE 2009 - Subtopic 01-7 - DS: 'Power Device Models, Drive and Protection' 
   [return to parent folder]  
 
   A Static and Dynamic Model for a Silicon Carbide Power MOSFET 
 By Nathabhat PHANKONG, Tsuyoshi FUNAKI, Takashi HIKIHARA 
 [View] 
 [Download] 
Abstract: Static C-V and I-V characteristics related dynamic behaviors of power MOSFET. Models for Si power MOSFET have already been obtained through the previous studies. Based on the model, a model for SiC power MOSFET is proposed that includes the physics of semiconductor, physical structures of the device, and extracted parameters from the measured C-V characteristics. The static I-V characteristics are also discussed with the C-V characteristics. It is clearly shown that the simulated results in switching behavior of the proposed model coincide with experimental results suitably in some conditions.

 
   Dynamic characterization of high voltage power MOSFETs for behavior simulation models 
 By Vera HÖCH, Heiner JACOBS, Jürgen PETZOLDT, Andreas SCHLÖGL, Gerald DEBOY 
 [View] 
 [Download] 
Abstract: This paper describes the determination of interelectrode capacitances of a fast switching high voltage super junction transistor from dynamic measurements in a commutation circuit with a SiC Schottky diode. The gained capacitance voltage characteristics reflect the transistor’s effective parasitic capacitances during switching for the given application. Thus, these characteristics are used for the transistor’s parameterization within a buck converter simulation model. The resulting switching simulation characteristics of the transistor correspond virtually with the appendant dynamic measurements.

 
   Electro-thermal behaviour of a SiC JFET stressed by lightning-induced overvoltages 
 By Dominique BERGOGNE 
 [View] 
 [Download] 
Abstract: JFET are experimentally stressed to provide data for modelling, inverter and driver design. The experimental set-up is described. A surge generator is built and a SiC JFET is stressed. During the stress, a temperature estimation is done at increasing time steps, in order to obtain the full thermal response versus time.

 
   HF Gate Drive Circuit for a Normally-On SiC JFET with Inherent Safety 
 By Tsuguhiro TAKUNO, Takashi HIKIHARA, Takashi TSUNO, HATSUKAWA SATOSHI 
 [View] 
 [Download] 
Abstract: A gate drive circuit for a silicon carbide (SiC) JFET is introduced from the standpoint of application to power conversion circuit. This gate drive circuit enables normally-on JFETs as close as normally-off devices at high switching frequency. The voltage and current responses of the implemented circuit are discussed under loads at the switching frequencies over 1MHz.

 
   IGBT Cross Conduction Phenomenon - Origin and Simple Protection Gate Driving Technique 
 By Petar GRBOVIC, Michel ARPILLIERE 
 [View] 
 [Download] 
Abstract: In this paper, a problem of isolated gate bipolar transistor (IGBT) cross-conduction caused by re-applied collector emitter voltage is discussed and a simple gate driver that eliminates this issue is proposed. Variation of the collector emitter voltage of the IGBT that is switched off causes the collector gate displacement current that pumps the gate emitter capacitance and elevates the gate emitter voltage. If the gate emitter voltage reaches the threshold voltage the cross-conduction happens. Then the collector current and turn on losses increase significantly. Some measures to prevent such a critical malfunctioning are discussed in this paper. The most effective solution is the use of negative gate emitter voltage. In design of low cost power converters, the bootstrap power supply is the most cost effective solution. However, a limiting factor for the application of the bootstrap topology in higher voltage power converters is the fact that bootstrap supply does not provide negative gate voltage. An improvement of bootstrap power supply, which provides negative gate voltage is analyzed and proposed in this paper. The solution is experimentally verified and results are discussed.

 
   Increasing the Breakdown Capability of Superjunction Power MOSFETs at the Edge of the Active Region 
 By Norbert REINELT, Markus SCHMITT, Armin WILLMEROTH, Holger KAPELS, Gerhard WACHUTKA 
 [View] 
 [Download] 
Abstract: When superjunction power MOSFETs operate near the rim of the safe operating area, avalanche breakdown can occur in the transition region between the active cell array and the edge termination. Numerical device simulations confirmed this and revealed local charge imbalances, created by irregularities in the superjunction doping pattern, as major cause. Based on the simulation results, we proposed optimized transitions of the superjunction doping pattern from the active cell array to the edge termination. Numerical device simulations as well as experiments demonstrated the enhanced breakdown capability of these transition regions.

 
   Investigation on 3.3 kV-50A IGBT protection against over-voltage conditions 
 By David FLORES, Salvador HIDALGO, José REBOLLO, Christian CARAMEL, Jean-Louis SANCHEZ, Eric IMBERNON, Julie LE GAL 
 [View] 
 [Download] 
Abstract: This paper deals with the design and fabrication of monolithically integrated voltage sensors with 3.3 kV IGBTs. Firstly, the sensor concept is introduced, and experimental validation on 600 V IGBTs is presented. Guidelines for the design of a 3.3kV IGBT including the reported anode voltage and current sensors are provided together with its process fabrication.

 
   Modelling of a Symmetrical Bipolar Monolithic Bidirectional Switch 
 By Luong Viêt PHUNG, François IHUEL, Nathalie BATUT, Jean-Baptiste QUOIRIN, Ambroise SCHELLMANNS, Laurent VENTURA 
 [View] 
 [Download] 
Abstract: The purpose of this paper is to introduce a new concept of symmetrical power bipolar junction transistor for appliances applications with low forward voltage (< 1 V). Design and static simulations are discussed as well as the potential electrical impact of silicon hydrophobic direct wafer bonding used to realize such a device. Simulations results, for a nominal current of 5 A and a breakdown voltage of 500 V, are compared with existent solutions.

 
   Silicon Carbide PiN Physically-Based Model Implemented in the Pspice Circuit Simulator 
 By Leobardo HERNÀNDEZ, ABRAHAM CLAUDIO, Marco RODRIGUEZ, Mario PONCE, Pedro ROSALES, Carlos Zuñiga 
 [View] 
 [Download] 
Abstract: The main novelty in this paper is modeling with Pspice the real stored charge inside SiC PiN diodes depending on the working regime of the device (turn-on, on-state, and turn-off). The developed model is based on the adequate calculation of the ambipolar length (L) as a function of the charge injected to the N- region, which allows finding an analytical solution for the ambipolar diffusion equation (ADE). In special during the turn-off, the carrier concentration was modeled in three different regions. The physical-based model allows predicting dynamic and static behaviors of the SiC PiN diode.