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 EPE 2022 - DS2b: System Integration, Packaging & Thermal Management 
 You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2022 ECCE Europe - Conference > EPE 2022 - Topic 01: Devices, Packaging and System Integration > EPE 2022 - DS2b: System Integration, Packaging & Thermal Management 
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   Advanced Low-Voltage System-in-Package Half-Bridge MOSFET with Added Protection Features 
 By Salvatore MUSUMECI 
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Abstract: This paper deals with a smart System in Package (SiP) synchronous MOSFET half-bridge with internal current and thermal sensing circuits devoted to low-voltage supplies for autonomous driving applications. This kind of advanced application requests that Buck, Boost, or Buck-Boost converters can supply and stabilize the voltage. Furthermore, the temperature and the load current must be continuously monitored and controlled to increase the system's reliability. The SiP half-bridge described is experimentally evaluated in a Buck converter operation. Finally, a Buck interleaved configuration to improve the output current ripple and increase the current fed is experimentally investigated. The experimental results investigation demonstrates the effectiveness of the proposed SiP integrated half-bridge solution for an enhanced and reliable low voltage power supply.

 
   Characterization of Si-IGBT Crosstalk with a Concentration on Power Circuit Parasitic Elements and the Device Operation Point 
 By Amir AZAM RAJABIAN 
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Abstract: Crosstalk is a serious issue in power electronics converters having a phase-leg in their structure. The crosstalk destructive effect can lead to failure of the device. Hence, several models are presented in the literature to analyze the crosstalk and prevent the undesired failures. However, these models need to be enhanced so as to be characterized in different aspects. In this paper, a new comprehensive model based on the last models in state-of-art has been presented. This model includes the parasitic elements of the power circuit and parasitic capacitances of Si-IGBT. Thus, the effect of variable elements can be investigated. In this paper, the effect of the high-side switch specifications such as off-sate voltage, conducting current, and turning-on time on the crosstalk has been figured out. It is found that the most critical condition in terms of the crosstalk is when the converter operates on the high voltage levels of DC-bus and light-load conditions. Moreover, the different values of parasitic inductance are considered in the model, and their effect on the crosstalk is evaluated. Furthermore, the experimental setup has been introduced in order to check the model accuracy. In order to study the effect of Si-IGBT parasitic capacitances, the ratio of CGC/CGE has been changed, and results have been presented. The case study device for the investigation of the crosstalk and experimental tests is IXGH60N60.

 
   Design of a serial impingement cooling heatsink for a 30 kW PV string inverter 
 By Guillaume PIQUET BOISSON 
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Abstract: The design of a cooling solution for a 30 kW string inverter is detailed in this paper. As opposed to traditional solutions, a novel approach has been proposed, consisting of three pinfin copper heatsinks tightly arranged with mutual airflow. This solution has been characterized on a dedicated test bench, partly based on a TSEP itself precisely calibrated, both being described in this paper. Comparisons between traditional solutions, expected solution, characterized solution, and perspective solutions have been conducted based on the CSPI indicator, reaching up to 34.

 
   Hybrid circuit board structure for power electronics 
 By Gerrit BRAUN 
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Abstract: The objective of this paper is to show a novel approach for integrating GaN semiconductors as a discrete SMD component using an additional printed circuit board (PCB) for the power electronics of a PV inverter. This additional PCB is designed as an integrated metal substrate (IMS) circuit board to conduct the dissipated heat from the semiconductor into the heat sink. The IMS board is soldered with a BGA connection to a larger mother board. Therefore, usual production steps of electronics production are used to make the structure as simple as possible.

 
   Improvement of a self-powered gate driver power supply 
 By Mariana RAYA 
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Abstract: In this work, an improved self-powered gate driver power supply is proposed, analyzed by simulation and experimentally validated. This solution is based on the addition of a voltage regulator and it achieves a floating, constant and robust voltage to supply the gate driver and auxiliary circuits (protections, sensors, local control and communications) in switching cells for multilevel converters implementation. The obtained gate driver supply voltage is stable for a wide range of frequencies and auxiliary circuit current consumptions. Moreover, the main characteristics of the main transistor turn-on and turn-off are preserved while decreasing the power dissipation of the gate driver power supply circuit.

 
   Insulation Design and Analysis of a Medium Voltage Planar PCB-based Power Bus Considering Interconnects and Ancillary Circuit Integration 
 By Joshua STEWART 
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Abstract: This paper presents a design method for a medium voltage (MV) PCB-based bus, focusing on interconnects and considerations for the integration of converter level ancillary circuits. A 6 kV power electronics building block (PEBB) is used as a case study to analyze the design of its PCB bus. Surface mounted balancing resistors and interconnects for power terminals are integrated to further increase the PEBB's power density. PCB-embedded structures, referred herein as shield pads, are introduced as a method to control the peak electric field (E-field) intensity in air near critical terminals and other devices. Additional features to relax the requirements for insulation design within the converter were also incorporated to fully leverage the design flexibility offered from a PCB bus. The final bus demonstrated a partial discharge inception voltage (PDIV) of 11.04 kV.

 
   Study on Commutation Loop Inductance and Current Distribution to DC-link Capacitors in a GaN Half-bridge 
 By Benedikt KOHLHEPP 
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Abstract: Modern wide bandgap power semiconductors allow for increased efficiency compared to conventional semiconductors by faster switching transients. In order to harness the full performance from these components, parasitic inductances must be minimized. FEM simulations can deliver the parasitic inductances and thus, can be used to optimize the PCB layout and the placement of semiconductors and DC-link capacitors. Also cost constraints apply to most of the power electronic circuits. FEM simulations can facilitate the determination of cost optimized designs by reducing the amount of DC-link capacitors. Therefore, the current distribution incorporating the DC-link capacitors is required. An analysis of a GaN half-bridge shows the potential to omit one poorly utilized MLCC capacitor.

 
   Temperature Distribution of an IGBT Chip during Repetitive Switching Events under Consideration of Front-Side Ageing 
 By Christian BAEUMLER 
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Abstract: Ageing effects are considered to provoke an inhomogeneous current distribution within power devices. The resulting temperature distribution at the junction and the surface of an IGBT chip was investigated in detail at different ageing states and for different switching frequencies during repetitive hard-switching events. Furthermore, the limitations of utilized methods for temperature determination were discussed. The observations were judged with respect to reliability issues.