| Abstract |
Modern wide bandgap power semiconductors allow for increased efficiency compared to conventional semiconductors by faster switching transients. In order to harness the full performance from these components, parasitic inductances must be minimized. FEM simulations can deliver the parasitic inductances and thus, can be used to optimize the PCB layout and the placement of semiconductors and DC-link capacitors. Also cost constraints apply to most of the power electronic circuits. FEM simulations can facilitate the determination of cost optimized designs by reducing the amount of DC-link capacitors. Therefore, the current distribution incorporating the DC-link capacitors is required. An analysis of a GaN half-bridge shows the potential to omit one poorly utilized MLCC capacitor. |
