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Insulation Design and Analysis of a Medium Voltage Planar PCB-based Power Bus Considering Interconnects and Ancillary Circuit Integration
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| Author(s) |
Joshua STEWART |
| Abstract |
This paper presents a design method for a medium voltage (MV) PCB-based bus, focusing on interconnects and considerations for the integration of converter level ancillary circuits. A 6 kV power electronics building block (PEBB) is used as a case study to analyze the design of its PCB bus. Surface mounted balancing resistors and interconnects for power terminals are integrated to further increase the PEBB's power density. PCB-embedded structures, referred herein as shield pads, are introduced as a method to control the peak electric field (E-field) intensity in air near critical terminals and other devices. Additional features to relax the requirements for insulation design within the converter were also incorporated to fully leverage the design flexibility offered from a PCB bus. The final bus demonstrated a partial discharge inception voltage (PDIV) of 11.04 kV. |
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| Filename: | 0403-epe2022-full-14360427.pdf |
| Filesize: | 742.6 KB |
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| Type |
Members Only |
| Date |
Last modified 2023-09-24 by System |
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