Please enter the words you want to search for:

 EPE-PEMC 2004 - Topic 01-4: Device characterization and applications 
 You are here: EPE Documents > 04 - EPE-PEMC Conference Proceedings > EPE-PEMC 2004 - Conference > EPE-PEMC 2004 - Topic 01: DEVICES > EPE-PEMC 2004 - Topic 01-4: Device characterization and applications 
   [return to parent folder]  
 
   Analyzing Of The Mos-Fet Turn-Off 
 By Oto Tezak, Drago Dolinar, Miro Milanovic 
 [View] 
 [Download] 
Abstract: Presented is the analysis and the design of the turnoff snubber circuits for low power dc-dc converters realized with MOS-FETs. The appropriate usage of the snubber circuit can increase the power range of the low-power dc-dc converters available as integrated circuit. The evaluation of snubber circuit is based on experimental results. The power transistor dissipation can be 30% lower in the case that the efficiency of converter not changes. Benefits, drawbacks and limits of the proposed approach are detailed and studied.

 
   Experimental Evaluation Of The Influence Of Modern Mosfet Devices On The Phase Node Ringing In Vrm Power Converters 
 By S. Musumeci, R. Pagano, A. Raciti, G. Belverde, C. Guastella, M. Melito 
 [View] 
 [Download] 
Abstract: The paper deals with the impact of the last generation MOSFETs on the ringing phenomenon occurring on the phasenode of a buck converter, which is utilized as voltage regulator module (VRM). In particular, the present paper deals with the behavior of the converter with reference to the low-side MOSFET switch. In fact, the impact of the device behavior has been analyzed in order to better understand the effects on the voltage transient of the phase-node. The influence of the electrical parameters that concern this topic, such as the gate equivalent impedance and the board layout influence, has been investigated in an actual buck converter. Moreover, aiming to individuate a good solution to limit the parasitic transient, two different choices of the low-side switch have been realized by implementing a trench-MOSFET and a strip-layout MOSFET. Finally, the main theoretical and experimental results are analyzed and discussed.

 
   Improvement Of Ability For Dc Current Interruption By Diverting Circuit 
 By Akira Sugawara(jp), Tsukasa Furuse(jp), Kouichi Itagaki(jp), Hazairin Samaulah(id), Masami Takada(jp) 
 [View] 
 [Download] 
Abstract: For interruption of DC circuit current using a small relay, characteristics of arc duration time for the relay contacts are measured. A diverting element is connected to parallel with the relay contacts. As the diverting element, a PTC (Positive Temperature Coefficient Resistor) or a capacitor is used. It is desirable that the initial resistance of the PTC is small and that the capacitor can sufficiently absorb the arc current. By parallel connecting a diverting element with a pair of relay contacts, it is possible that arc duration time between relay contacts shortens.

 
   Third Quadrant Output Characteristics In High Density Trench Mosfets 
 By Toni Lopez(de), Reinhold Elferich(de), Nick Koper(nl), Tobias Tolle(de), Thomas Duerbaum(de) 
 [View] 
 [Download] 
Abstract: This paper investigates the DC output characteristics of ultra high-density trench MOSFETs for synchronous rectifier applications. Measurement results show a drain current asymmetry between the first and third quadrant of the output characteristics that cannot only be attributed to the intrinsic body diode current. 2D numerical simulations are employed to study the drain current distribution through the semiconductor structure. Current flow lines and carrier concentration graphs reveal the existence of a significant channel current in the subthreshold region partly responsible of the asymmetry. This effect might be of relevance in the application and therefore needs to be considered in any circuital model. SPICE simulations employing a behavioural macro MOSFET model depict the impacts on a synchronous buck converter.

 
   Using Bifurcation Analysis For Control Design Of Virtual Negative Inductance 
 By Octavian Dranga, Hirohito Funato, Satoshi Ogasawara(jp), Janos Hamar(jp), Istvan Nagy(hu) 
 [View] 
 [Download] 
Abstract: A variable active-passive reactance (VAPAR) has already been proposed for applying as virtual variable inductance in power circuits. One of its most remarkable features is the capability of generating a negative virtual inductance. VAPAR has found applications in the rapid power flow control of power systems, the power flow being essentially restricted by a line reactance. Therefore, the system under investigation is represented by a series RL configuration including VAPAR. One basic aim of the design of the feedback loop controlling VAPAR is to avoid instability or bifurcations that can be detected when the loop gain is varied. The stability analysis performed uses the stroboscopic map to model the operation of the variable-structure, piecewise-linear, non-linear system. The nonlinearity stems from the dependence of the switching instant of VAPAR on state variables. The eigenvalues of the Jacobian matrix of this map, evaluated at its fixed point, are employed for the stability assessment. The results allow convenient and accurate identification of the control domain ensuring stable operation and good transient performances in the parameter space of the virtual negative inductance and the loop gain.