EPE 2003 - Topic 01h: Reliability of Devices | ||
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![]() | A new method to detect partial discharges in high voltage power modules
By Th.Lebey; D. Malec; S. Dinculescu; F. Breit; E. Dutarde | |
Abstract: IGBT hybrid power modules used in railway applications are constituted of several dielectric
materials. When a high voltage is applied, this dielectric material stack may be a source of
partial discharges. We present a new method for determining partial discharges activity in
power modules. PD appears for voltages lower than the ones found according to the
normalized test. In this paper the method and possible sources of PD are investigated.
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![]() | Influence of repetitions of short-circuits conditions on IGBT lifetime
By F. Saint-Eve; S. Lefebvre; Z. Khatir | |
Abstract: The paper deals with the behaviour of PT and NPT IGBTs under repetitive short-circuit
operations. The repetition of these severe working conditions is responsible for one mode of devices
ageing and results unavoidably in the components failures. A long term campaign of experimental
tests was made in order to determine the number of short circuit operations the devices can support
before failure for different dissipated energies during the Short Circuit tests. The results show the very
good ability of these devices to work in short circuit operations when the dissipated energy is lower
than a particular critical energy.
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![]() | Breakdown improvement and reliable driving of High-Voltage NMOS fabricated in fully implanted CMOS
By P. M. Santos; H. Quaresma; A. P. Silva; M. Lança | |
Abstract: This paper discusses the viability of using last generation fully implanted digital CMOS technology to
develop a High-Voltage NMOS library for smart power integration. Devices are based in the classical
extended drain and in the fully CMOS compatible gate-shifting techniques to achieve experimental
breakdown voltages in the range of 22-30 V.
The trade-offs of using high overdrive voltages, above digital nominal supply, to reduce On-resistance
is also discussed. According to experiments on prototypes the gate oxide thickness is the most
important limitation to the maximum allowable gate voltage in order to achieve a long-term reliable
performance, especially in high-side symmetric transistors. Devices under excessive overdrive
voltages over long periods revealed threshold voltage and transconductance variations, due to gate
oxide degradation.
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![]() | The surface component of PN junction reverse current - A serious limitation for the operation of silicon power bipolar devices above 150-175°C.
By K.I. Nuttall; V.V.N. Obreja | |
Abstract: This work investigates the contribution from surface leakage to the total reverse current in high voltage semiconductor diodes operating at high junction temperatures. Experimental results are presented for standard recovery and fast recovery rectifier diode dice at high temperature. An original experimental method able to reveal the influence of the surface component of the reverse current is described and has been applied. The work concludes that surface currents remain a significant component of the reverse leakage current in silicon power devices and can be an important factor that limits their maximum operating temperature.
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![]() | The inclusion of switching frequency in power cycling studies
By A. Beutel; J. M. Van Coller | |
Abstract: It is known that switching frequency greatly affects the variation in the difference in temperature between the junction and case, ∆TJC. In this paper the use of this effect when determining power cycling capability of IGBTs and free-wheeling diodes is investigated. This is achieved by modelling a typical inverter circuit. It is shown that IGBTs are stressed more than diodes for a typical load power factor. It is also shown that the switching frequency has a large effect on this stress.
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![]() | A methodology for worst-case tolerance design
By D. Magot; F. Wurtz; B. Cogitore; J-P. Keradec | |
Abstract: Optimization techniques are efficient to deal with sizing steps that designers have to
perform. However, their industrial usefulness is also subject to their ability to deal with tolerance
issues. Indeed, tolerances may have significant effects on device reliability. They can come from a
wide range of sources, such as environmental changes, manufacturing tolerances or aging. A generic
methodology has therefore been devised, to account for tolerances while sizing a device. It is based on
the use of unconstrained optimization processes inside sizing models. Hence, the building of those
sizing models becomes more complex. However, this additional complexity can be partly hidden to
the designer, using appropriate software tools. The efficiency of the proposed approach is shown here
on an industrial example, which involves the design of a current measurement transformer. Eventually,
this methodology is believed to be general enough to be applied in other technical domains.
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![]() | Power cycling test circuit for thermal fatigue resistance analysis of solder joints in IGBT
By L. Dupont; S. Lefebvre; Z. Khatir; J.C. Faugières | |
Abstract: The paper will give a detailed presentation of an active power cycling test bench in high
temperature conditions developed to ageing the solder between the Direct Copper Bonding (DCB) and
the base of IGBT devices. The average junction temperature measurement protocol, the temperature
regulation of the base plate, the acquisition of all the electrical signals, and the performance of the test
circuit will be presented and discussed. Moreover, a thermal modelling presentation has been used to
define the power cycling test parameters. The paper will present results of long time power cycling
tests in server working conditions in the case of a base plate temperature equal to 90 °C, for a power
injection of 300 W/cm2 during 10 s.
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