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 EPE 1993 - 25 - Dialogue Session DS1.1: DEVICES: MATERIALS AND PROCESSES 
 You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 1993 - Conference > EPE 1993 - 25 - Dialogue Session DS1.1: DEVICES: MATERIALS AND PROCESSES 
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   TURN-OFF TIME/ON-RESISTANCE TRADE-OFF CONTROL WITH ELECTRON IRRADIATION AS RELATED TO POWER SWITCHING BSITs 
 By Alexander Y. Usenko 
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Abstract: Experimental data on the effect of electron irradiation and annealings on the electric characteristics of high voltage power static induction transistors (BSITs) are given. The anneal behavior of radiation-induced defects in active areas of BSITs is discussed. A criterion of preference for centers, which controls lifetimes is suggested. The crlterion of preference fits the A-center. In addition, it is shown the processing gives best improvement of the characteristics, when phosphorus impurity concentration severely exceeds oxygen concentratlon in the heavily doped Si substrata and oxygen content greatly exceeds carbon content in the epilayer.

 
   CARRIER TRANSPORT AND MICROSTRUCTURE IN SEMI-INSULATING POLYCRYSTALLINE SILICON 
 By S. Lombardo; S. U. Campisano; F. Baroetto 
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Abstract: Conductance in semi-insulating polycrystalline silicon (SIPOS) has been measured as a function of temperature and of applied transverse electric fields in materials whose oxygen content was varied from 2 up to 35 at. % O. Transmission electron microscopy reveals the presence of crystalline Si grains whose average radius decreases with the oxygen content, going up to approx. 2 nm at the maximum oxygen concentration. The conduction is described by thermionic emission of electrons above intergrain harriers, tunneling through the harriers and Frenkel emission of electrons from the grain boundaries. The carrier transport parameters have been correlated to the material microstructure. At low oxygen contents, SIPOS has a 'mosaic' structure in which the grains are covered discontinuously by oxide. At 30 at. % O and above the material has a 'shell' microstructure, characterized by grains covered continuously by oxide shells. Upon annealing at 1200°C, at these large oxygen contents we observe the transition to a mosaic structure.

 
   THE EFFECT OF RECOMBINATION CENTERS ON THE LIFETIME DEPENDENCE UPON TEMPERATURE AND INJECTION LEVEL 
 By A. Sanseverino; P. Spirito 
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Abstract: In this paper the effect of the energy levels of the recombination centers from lifetime dependence versus temperature at both low and high injection levels is pointed-out, for case of single and multiple recombination levels. The temperature dependence of lifetime allows to evaluate the energy levels of the recombination centers by using a differential a.c. measurement technique. Here the above technique has been used for thick, low doped layer to detect the recombination centers present in "good" quality materials. The results show that the recombination centers in these materials are relatively shallow.

 
   SILICON TO SILICON DIRECT BONDING - CHARACTERIZATION OF THE INTERFACE AND MANUFACTURE OF p-i-n DIODES 
 By R. Wiget; E. P. Burte; J. Gyulai; H. Ryssel 
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Abstract: A Silicon Direct Bonding (SDB) process using a special chamber for cleaning, contacting and prebonding wafers was developed. Yields above 80% on each wafer were achieved. The silicon wafers were contacted immediately after cleaning under cleanroom conditions. Then the contacted wafers were prebonded at 200°C using a bonding pressure up to 0.1 N/cm2. Annealing was carried out for times ranging from 30 minutes to 10 hours at temperatures of 1050°C and 1180°C. In order to characterize the bonded interface, scanning electron microscopy (SEM), infrared analysis and current voltage (I-V) measurements were conducted. The electrical specification was done by evaluating the I-V characteristics of the p-n junction with respect to the ideality factor (n), series and parallel resistance (Rs, Rp), and reverse current (Is). Strong dependence of Rs and non bonding temperature and time was observed. At 1180 °C, a series resistance of 3,16 Ohm and a n-factor of 1.07 was achieved. In order to proof the viability of the bonded substrates to the application for power devices, p-i-n diodes were fabricated exhibiting breakdown voltages up to 1400 V and forward current densities of 2.5 A/mm² (total area 13,5 mm²). These diodes proved to be superior to comparable epitaxial diodes.

 
   A SIMPLE OPTICAL METHOD OF IN-PROCESS CHECKING OF GTO UNIFORMITY 
 By V. Benda; P. Spur; J. Martinek 
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Abstract: For reliable function of high-power GTO thyristors it is very important that the parallel-connected segments of the GTO structure be of the same characteristics, both static and dynamic. The presented paper deals with a study of homogeneity of large-area GTOs by measuring the current gains distribution over the GTO structure. The local current gains in individual segments of a large area GTO may be evaluated from the reverse current induced by light generated by a GaAs LED over the reverse biased thyristor structure. Measurements on all segments of a GTO structure under the condition of constant voltage between the gate and the anode enables us to evaluate the large area GTO homogeneity with respect to low injection carrier lifetime. The equipment developed enables to obtain the current gain distribution in a very short time and no cathode contact of any segment could be damaged during checking the GTO homogeneity. Hot spots found within the tested GTO structures were in good accordance with the prediction done by described method.

 
   ELECTRON BEAM TECHNOLOGY FOR POWER SEMICONDUCTOR DEVICE FABRICATION 
 By V. A. Zlobin 
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Abstract: The adaptation of electron beam lithography and electron beam testing techniques for production of new power semiconductor devices and some of its applications are presented. An approach is developed to decrease information volume for exposition of large chips by electron beam lithography. The computer arrangement of electron beam system and the scheme of data preparation for the electron beam lithography are proposed. It is shown that method of electron beam induced current permits to observe the 3-dimensional image of gate p-n junction in SIT structure. Electron beam testing technique is developed to measure the current gain distribution in power bipolar transistor and IGBT chips.