Please enter the words you want to search for:

 01 - Madep - M01 - MATERIAL AND PROCESSES 01 
 You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 1991 - EPE-MADEP Joint Sessions > 01 - Madep - M01 - MATERIAL AND PROCESSES 01 
   [return to parent folder]  
 
   POWER SEMICONDUCTOR DEVICES FOR THE 1990'S 
 By B. Jayant Baliga 
 [View] 
 [Download] 
Abstract: Recent advances in two and three terminal power devices are reviewed. In the case of rectifiers, the combination of Schottky barriers with P-N junctions has led to significantly better characteristics. In the case of three-terminal switches, the power MOSFET and IGBT have been replacing the bipolar transistor due to ease of control. Further advances in silicon power devices are anticipated by the creation of MOS-gated thyristor structures. The availability of these MOS-gated devices is also enabling the formation of smart power ICs. On a longer time scale, silicon carbide based devices could replace the entire spectrum of silicon power devices.

 
   POWER LOSSES IN SILICON AND SILICON CARBIDE DIODES 
 By S. H. Gamal; M. L. Locatelli; J. P. Chante 
 [View] 
 [Download] 
Abstract: The power losses as function of junction temperature of two diodes of the same order of magnitude of the breakdown voltage have been compared in a ramp switching under the same operating conditions. One diode is a fast p-i-n silicon diode, and the other is a silicon carbide one. The turn-off losses were less for the SiC diode only for high temperafure, while the forward losses were higher over the whole temperature range. A considerable improvement in the turn-on behaviour, as well as in the reverse characteristics for the SiC diode was evident, leading to negligible losses.

 
   SWITCHING PROPERTIES OF POWER DEVICES ON SILICON CARBIDE AND SILICON 
 By H. Schlangenotto; E. Niemann 
 [View] 
 [Download] 
Abstract: Theoretical considerations and modelling calculations on switching properties of sic devices are presented, and a comparison with sillicon devices at room temperature is given. Figures of merit are described Which are significant for the design as well as for the range of applicability. As essential figure of merit considering on-state and switching properties, the ratio of on-conductance to the stored charge is introduced. A trade-off relation between on-state and turn-off losses of MOSFETs is derived, which is very advantageous for Sic as represented by this figure of merit. The reverse recovery behaviour of Schottky-diodes is calculated, using the cubic polytype B-SiC for numerical examples. It is shown, that for given on-state power losses per active device area, the recovery behaviour of Schottky-diodes with a breakdown voltage of 500 V is nearly equal for devices of B-SiC and silicon. The power losses themselves, however, are just as the area smaller for the sic diode by a factor of nearly 4.

 
   THEORY AND TECHNOLOGY OF PIN-DIODES ON GaAs 
 By F. G. Della Corte; G. Schweeger; G. Cocorullo; H. L. Hartnagel; G. F. Vitale 
 [View] 
 [Download] 
Abstract: A contribution to the theory and technology of pin diodes on GaAs is made. Such diodes have been produced by zinc thermal diffusion or berillium implantation. In order to reduce the interaction of Ga and Au at the backside ohmic contact, a diffusion barrier of WSi2 bas been used, which improved the reliability of the devices at the higher temperatures. They were measured at temperatures up to 300°C and comparisons with an analytical model developed by the authors, which is briefly outlined, revealed very good correlation from low to high injections rates. The model could therefore be used to determine important useful parameters. The expected degradation of diodes during an accelerated lifetime test at 300°C with additional electrical stress could not be observed.

 
   A NEW FABRICATION TECHNIQUE OF GaAs POWER DEVICES USING LIQUID PHASE EPITAXY 
 By T. Sukegawa; M. Suzuki; M. Kimura; T. Kamiya; A. Tomita; A. Tanaka 
 [View] 
 [Download] 
Abstract: The initial results of epitaxial growth of a thick heavily doped GaAs layer on a low-impurity GaAs wafer by LPE technique and its application to fabrication of pin diodes are presented. The major results indicate that the lattice constant of the p+ (Ge-doped) epilayer can be fit to that of low-impurity wafer and that it is possible to use the near intrinsic layer with a desirable thickness as the active region of power devices. It was confirmed that the pin diode with a thick high purity layer had the abilities of photodetection and emission in the near infrared region. It is ascertained that the LPE technique using the lattice compensation effect is the promising technique for the fabrication of the GaAs power devices.