EPE 2011 - DS2d: Topic 01: Simulation, Modelling and Virtual Prototyping, Control and Protection of Power Devices | ||
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![]() | A Comprehensive Physics-Based Power MOSFET Model in VHDL-AMS for Circuit Simulations
By Lutz GOEHLER, Matthias ROSE | |
Abstract: This paper presents a comprehensive Power MOSFET model for system and circuit simulation and its implementation in VHDL-AMS. The equation set features a non-quasi-static description of the body diode, a charge model for the inner MOSFET, self-heating and the inclusion of major parasitics. A comparison between simulation and measurement proves the good quality obtained.
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![]() | A Datasheet Driven Power MOSFET Model and Parameter Extraction Procedure for 1200V, 20A SiC MOSFETs
By Mihir MUDHOLKAR, Mahmood SAADEH, Alan MANTOOTH | |
Abstract: A compact model for SiC Power MOSFETs has been presented. The model has been validated with measurements from commercially available 1200V, 20A SiC power MOSFETs. The model features temperature scaling from 25°C to 225°C, which is the operating temperature for the new devices. In order to improve the user’s experience with the model, a new datasheet driven parameter extraction strategy has been proposed. The parameter extraction strategy requires only the data normally given in device datasheets, so off-the-shelf devices can characterized quickly. The model includes charge conserving expressions for all non-linear capacitances of the power MOSFET. The SiC power MOSFET shows excellent performance over elevated temperatures, with small variation in on-state resistance over temperature.
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![]() | A magnetically isolated gate driver for high-speed voltage sharing in series-connected MOSFETs
By Philip ANTHONY, Neville MCNEILL, Derrick HOLLIDAY, Duncan GRANT, George HEARN | |
Abstract: A scalable resonant gate drive circuit is described, suitable for driving series-connected MOSFETs in high-voltage, high-speed inverter applications for resistive and capacitive loads. Galvanic isolation is provided by a loop of high voltage wire, which also serves as the resonant inductor in the circuit. Fast dynamic voltage sharing is achieved by delivering equal current to each gate. A prototype is built and tested, demonstrating a 75ns switching time at 5kV using 900V MOSFETs.
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![]() | Active Protections for Normally-On SiC JFET
By Fabien DUBOIS, Dominique BERGOGNE, Damien RISALETTO, Herve MOREL, Cyril BUTTAY, Regis MEURET | |
Abstract: Normally-on Silicon Carbide (SiC) JFETs are powerful power switches that allow improvement of theefficiency and high temperature operation of Voltage Fed Inverter (VFI). Moreover, the need forheavy and costly cooling system can be radically decreased due to the high thermal conductivity thatexhibits the SiC material compared to Si counterpart. However some safety considerations have to betaken against short-circuit and voltage breakdown. In this paper, it is proposed an overview of thefailure mechanisms of the SiC JFET. Fast and reliable solutions to protect SiC JFETs are alsopresented. Experimental validation of such protections and investigation of gate destruction mode areproposed
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![]() | Adaption of MOSFETs Current Slope by Systematic Adjustment of Common Source Stray Inductance and Gate Resistance
By Bjoern WITTIG, Ole MUEHLFELD, Friedrich W. FUCHS | |
Abstract: When switching power MOSFETs with high current ratings at low drain-source voltages the overvoltage at turn-off due to the induced voltages at the stray inductances in the commutation path has to be con\-sidered for gate drive circuit design. Increasing the gate resistance to keep the overvoltages below a specific limit for all operating points often leads to unacceptable high switching losses due to long voltage rise times and long turn-on and turn-off delay times. Therefore the influence of the common source inductance on the current slope during switching is investigated for low voltage power MOSFETs with high current ratings. In addition the gate resistance and the common source inductance are adapted simultaneously in order to minimize induced overvoltage combined with switching losses and lower turn-on and turn-off delay times at the same time.
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![]() | Averaging Methods for Electrical-Thermal Converter Models
By John SCHOENBERGER | |
Abstract: Simulating the transient thermal response and calculating the steady-state operating temperature of switching converter models is time consuming in a system with large thermal time constants. In this paper, two averaging techniques for speeding up the simulation of switching electrical-thermal converter models are presented and compared. With the loss averaging method, the switching device losses are averaged before being applied to a resistive-only thermal network. The steady-state operating point can then be rapidly simulated. With the circuit averaging method, an averaged converter model is used with averaged lookup tables, allowing the device losses to be calculated directly from the average device currents. This method permits a rapid transient simulation. In this paper, both methods are described in detail. An example inverter model, developed using PLECS, is simulated to demonstrate the operation and performance of the two methods.
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![]() | Construction of a Multi-Frequency Compact Electro-Thermal Model for IGBT-Based Power Inverters
By Joe ANTONIOS, Christophe BATARD, Nicolas GINOT, Yves SCUDELLER, Mohamed MACHMOUM | |
Abstract: This paper presents an approach for constructing a multi-frequency compact electro thermal model of IGBT-devices as inverters. Frequencies and time-scales of heat oscillations of transistors and diodes of IGBT devices were revealed as a function of operating parameters of inverters. It was shown that heat could oscillate according to different frequency domains, one referring to the load amplitude modulation in the range 0.1 Hz -50 Hz and the other associated with the switching frequency of the IGBT in the range 1 kHz – 20 kHz. A methodology was established for designing lumped RC thermal networks achieving good precision and low computational time for temperature calculation with respect to different components of heat oscillations. It was found that temperature varies according to different time-windows ranging from nanosecond to second. The model reduction strategy has been implemented on a unidirectional heat flow through a layered structure corresponding to the cross-plane of the IGBT device. The approach is based on analysis of heat diffusion rates and thermal penetration depths with regards to device topologies, materials, and frequencies. Results are presented and discussed.
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![]() | Enhanced Oscillation Circuit Analysis of Switching Mode Power Supplies
By Vera HÖCH, Andreas SCHLÖGL, Jürgen PETZOLDT, Tobias REIMANN | |
Abstract: In switching mode power supplies, the design of the used printed circuit boards, packages and semiconductor devices has a significant impact on the occurrence of instable oscillations during commutation. Different designs of semiconductors, packages and printed circuit boards are represented by different parameterizations of the applied behavior model of the switching mode power supply. Knowledge about the influence of different parameterizations of equivalent circuit elements on the oscillatory stability of power supplies is an important basis for the design of power supplies with an increased oscillatory stability. Therefore, this paper presents an enhanced oscillation circuit analysis. Besides revealing influencing factors on power supplies' oscillatory stability, this paper demonstrates that both an improved efficiency and an improved oscillatory stability of switching mode power supplies are only possible if the impact of different parameterizations of the circuit elements on the semiconductor losses is considered additionally.
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![]() | Evaluation of Inherent Elements in a SiC Power MOSFET by Its Equivalent Circuit
By Nathabhat PHANKONG, Tatsuya YANAGI, Takashi HIKIHARA | |
Abstract: Device parasitics or inherent elements in a power MOSFET limit and affect its switching behavior. Models for Si power MOSFET have already been obtained through the previous studies. Based on the model, an equivalent circuit for SiC power MOSFET is proposed with taking the physical structure into account and evaluating the inherent elements.
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![]() | IGBT Series Connection under Active Voltage Control
By Weiwei HE, Patrick PALMER, Xueqiang ZHANG, Mark SNOOK, Zhihan WANG | |
Abstract: In this paper an Active Voltage Control (AVC) technique is presented, for series connection of insulated-gate-bipolar-transistors (IGBT) and control of diode recovery. The AVC technique can control the switching trajectory of an IGBT according to a pre-set reference signal. In series connections, every series connected IGBT follows the reference and so that the dynamic voltage sharing is achieved. For the static voltage balancing, the AVC technique can clamp the highest collector-to-emitter voltage to a pre-set clamping voltage level. By selecting the value of the clamping voltage, the difference among series connected IGBTs can be controlled in an accepted range. Another key advantage for AVC is that by changing the reference signal at turn-on, the diode recovery can be optimized.
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![]() | Modeling of IGBTs With Focus on Voltage Dependency of Terminal Capacitances
By Shinji TOMINAGA, Hiroaki URUSHIBATA, Hideaki FUJITA, Hirofumi AKAGI, Takeshi HORIGUCHI, Shinichi KINOUCHI, Takeshi OI | |
Abstract: This paper presents a modeling of IGBTs with a focus on voltage dependency of capacitances between terminals of the IGBT. The proposed model is based on a physics-based IGBT model for circuit simulators to get accurate switching waveforms by taking account of the variable capacitances depending on the voltage between the terminals of the IGBT model. The basic feature is that the simulation accuracy of switching waveforms can be improved by applying the measured capacitances to the capacitors between the terminals. The simulated results by using the proposed IGBT model are in good agreement with experimental results.
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![]() | Ultrafast Turn-Off of a Normally-On SiC JFET for Protection Against Short-Circuit Operation
By Fabien DUBOIS, Damien RISALETTO, Dominique BERGOGNE, Remi PERRIN, Abderrahime ZAOUI, Herve MOREL, Régis MEURET | |
Abstract: The use of normally on Silicon Carbide (SiC) JFET devices poses the question of safety and reliabilityin Voltage Fed Inverter (VFI) applications. Indeed, when a JFET is not driven with a sufficientnegative voltage, the JFET is conducting and the VFI may be short-circuited. Therefore, it is needed togenerate a negative voltage to turn-off the JFET to protect the VFI in case of gate driver failure. Thesettling time of this negative voltage must be inferior to the power system constant time to reduce therise time of the short-circuit current. In this paper, a solution to protect the JFET and the system isproposed. A circuit description of an innovative topology using a Forward-Flyback topology withPrimary Side Sensing (PSS) technique and an Output Voltage Estimation based on the Time ConstantMatching (OVETCM) is presented. Moreover, the converter protects the VFI for an input range from3 V to 610 V and up to 150 °C. Experimental results are provided and validate the design of the safetysystem.
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