EPE Association: EPE 2022 - DS2d: Wide Band Gap Power Electronics

EPE 2022 - DS2d: Wide Band Gap Power Electronics
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2022 ECCE Europe - Conference > EPE 2022 - Topic 02: Power Converter Topologies and Design > EPE 2022 - DS2d: Wide Band Gap Power Electronics

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   A 20 kW, 3-level flying capacitor 1500 V inverter with characterized GaN devices for grid-tie applications
By Van Sang NGUYEN [View]
[Download]

Abstract: This work presents the static and dynamic characterizations of high voltage GaN power devices (GaN FET 900 V and GaN HEMT 1200 V) in order to implement a 3-level flying capacitor 1500 VDC inverter for high power density grid-tie applications with renewable energy sources such as solar and hydrogen energy. In the first part, the static characterizations are shown for two selected GaN power devices. Then these GaN devices were placed in a double-pulse-test-bench dedicated to the dynamic characterizations intended to observe the switching behaviors of the devices under the nominal voltage and current. Finally, in order to demonstrate the compactness of the converter, these GaN devices were implemented in a 20 kW, 3-level flying capacitor 1500 VDC inverter with the full-custom suitable passive elements of the output filters connected to the 800 VAC 3-phase grid.

   Design and analysis of a voltage clamping active delay control method for series connected SiC MOSFETs
By Rui WANG [View]
[Download]

Abstract: Series connection of power devices is an attractive approach to overcome the obstacle of the blocking voltage limitation of a single power device. However, voltage balancing measures should be taken to assure the anticipated performance of series connected power devices. In this paper, based on emerging silicon carbide (SiC) metal-oxide semiconductor field-effect transistors (MOSFETs), a clamping resistor-capacitor-diode circuit-based voltage clamping active delay control method is proposed to improve their voltage balancing performance. Compared with existing active delay control methods which sample the drain-source voltages of SiC MOSFETs as feedbacks, this proposed method utilizes the voltages of clamping capacitors as control criteria, which exhibits two prominent advantages: (1) an accurate model of the system is easier to attain (2) the feedback loop is simpler to design. After detailed demonstration of this method, the corresponding model is established to help determine appropriate control parameters, and experiments finally validate the effectiveness of the proposed method.

   Design Method of a High Frequency GaN-based Half-Bridge with Bottom-Side Cooled Transistors Using Multi-PCB Assembly
By Loris PACE [View]
[Download]

Abstract: This paper proposes a Multi-PCB (M-PCB) design of a half-bridge using bottom-side cooled GaN transistors with optimal layout and thermal management. The fabrication process only requires limited technological capabilities and is well-suited for industrial applications. Electrical and thermal performances are evaluated by measurements and simulation and compared with previous works.

   Experimental study of interleaved Y-Inverter performance
By Yusuke ENDO [View]
[Download]

Abstract: The Y-Inverter is rapidly gaining popularity as an alternative to the 'dc-boost plus inverter' configuration in motor drive applications. Recently, advantages of designing with multiple interleaved cells per phase, as opposed to simply paralleling devices, have been pointed out and solutions using both coupled and non-coupled inductors have been proposed. This paper presents a detailed experimental benchmark study of the inverter performance when using non-interleaved and interleaved cells; for the interleaved case, both non-coupled and coupled inductors are considered. The results clearly show that interleaving enables an important reduction of the current stress on the output and input filter capacitors, as well as the possibility to design the magnetic components with higher energy density and higher efficiency. Interleaving clearly appears as a superior alternative to the straightforward paralleling of semiconductor devices, when the current ratings are such as to require multiple transistors anyway. Specific differences in the circuit performance optimization potential exist between the case of coupled and non-coupled inductors. Only the interleaved non-coupled case is presented here in detail, with some comparison results. All cases will be dealt with in detail in the final paper.

   Fast Switching Planar Inductance Current Source ZETA Converter with Integrated Common Mode Filter
By Benjamin ZACHER [View]
[Download]

Abstract: The ZETA topology provides unique opportunities as a source for current-fed inverter systems. This topology enables coupling of input and output inductor to reduce the current ripple. In this paper, design aspects for a coupled inductor with an integrated common mode filter are described and the advantages to provide a current source characteristic using a ZETA converter are discussed. Relevant parasitic inductances and capacitances are calculated using finite element analysis and analytical models. The behavior of the multiphysics system consisting of electrical and magnetical domain is considered using a numerical system simulation including parasitic elements. This simulation shows good results and is compared to experiments. The experimental setup is using gallium-nitride eHEMT transistors with switching frequencies up to 1 MHz.

   Frequency and modulation index related effects in continuous and discontinuous modulated Y-Inverter for motor-drive applications
By Hamzeh J. JABER [View]
[Download]

Abstract: The effect of the pulse-width modulation scheme on the efficiency of a three-phase Y-inverter with a wide range of output voltages and currents is investigated experimentally in this paper. The efficiency measurements obtained while conducting experiments on a GaN-based Y-inverter prototype indicate that no pulse-width modulation scheme results in higher efficiency of the Y-inverter over the entire range of motor operation. In other words, depending on the operating conditions, a discontinuous PWM results in a higher or lower efficiency than a continuous sinusoidal PWM. As a result, there is a chance that using a hybrid modulation strategy will improve the efficiency of the Y-inverter. Furthermore, the distortion effect caused by inappropriate inductor and capacitor value selection is highlighted.

   GaN HEMT and SiC Diode Commutation Cell based Dual-Buck Single-Phase Inverter with Premagnetized Inductors and Negative Gate Driver Turn-off Voltage
By Tobias BRINKER [View]
[Download]

Abstract: This paper presents a highly efficient single-phase dual-buck inverter topology for the use in photovoltaic (PV) micro inverters with specific advantages for the application of switching cells composed of Gallium Nitride enhancement-mode high electron mobility transistors (GaN E-HEMTs) and silicon carbide (SiC) diodes. For this inverter topology, the opportunity to use negative gate turn-off voltage without affecting the reverse conduction losses is identified as a significant advantage. The impact of this effect on the switching losses is investigated. Double pulse tests with a hardware prototype were performed, showing a reduction of switching losses for high turn-off currents when negative gate turn-off voltages were applied.

   Implementation options of a fully SiC Buck-CSI for advanced motor drive application
By Yonghwa LEE [View]
[Download]

Abstract: This paper discusses the design option for a current source inverter for a 15kW high-speed machine with a wide-band-gap technology-based electric motor drive. Both control and modulation options are considered, as well as the integration of silicon carbide (SiC) bi-directional switches to yield high-performance bi-directional switches, as required by the topology. Recently, by taking advantage of the high-speed switching performance of SiC, a simple and robust control design method without voltage sensing and the Two-Third Modulation (TTM) method, which has the benefit of high efficiency, have been proposed. Based on this recent work, this paper proposes the simplified current-sensor-less controller of the CSI-fed PMSM. Also, this paper compared the characteristics of the TTM with the conventional PWM methods by simulation models.

   Non-parasitic induced transient overvoltage in ANPC topology due to critical switching sequences
By Michael GEISS [View]
[Download]

Abstract: This paper describes a semiconductor overvoltage in an Active-Neutral-Point-Clamped Converter(ANPC). This overvoltage occurs in case of inductive load when the output voltage of the ANPCchanges its polarity. In case of a grid inverter this occurs twice per grid period at the voltage zerocrossing. It can be observed in most of the ANPC-based power electronics with classical PWMpatterns and can reach the full DC-Link voltage. Although the ANPC is a well-known and widelyspread topology there has been no particular concern in literature about this effect yet. From our pointof view, the reason for this is a generous semiconductor dimensioning in terms of blocking voltageutilization and the limited energy due to the nature of the overvoltage. Nevertheless, this overvoltagecould become a problem in modern designs when SiC MOSFETs are used, and their Safe OperatingAreas (SOA) are pushed even further to the limits.The shown overvoltage is not a switching overshoot due to parasitic inductances and high switchingspeeds. It cannot be explained by 'hazardous' switching states either.In the following, the emergence is described in detail and a theoretical model is introduced andevaluated by simulations and measurements. Afterwards, methods to avoid the overvoltage are shownand a risk estimation is performed.

   Partial Discharges of Insulated Wires under Impulses from Wide Bandgap Power Electronics
By Ting HELMHOLDT-ZHU [View]
[Download]

Abstract: Due to the high voltage slopes from the wide bandgap (WBG) power electronics, which generate highfrequency (HF) electromagnetic noises, the identification of partial discharges (PD) becomes very cumbersome. In this paper, a validated PD detection system is utilized to decouple PD signals from those HF noises. In addition, the influences of different insulation systems, grade of insulated wires, steepness of the voltage slope as well as voltage overshoot because of various cable length on the PD events are also presented.

   Performance Evaluation of SiC-based Isolated Bidirectional DC/DC Converters for Electric Vehicle Charging
By Kaushik NARESH KUMAR [View]
[Download]

Abstract: In this paper, six 10 kW DC/DC isolated and bidirectional dual active bridge topologies, supplied by+750/0/-750V three-wire DC bus, are evaluated based on efficiency, loss distribution, volt-amperesemiconductors ratings and normalized cost of SiC MOSFETs for electric vehicle charging applications.The selected topologies are evaluated under the same voltage and power conditions, throughelectrothermal simulations and experiments. The simulation results were verified through experimentsconducted on 5 kW prototypes of four of the considered topologies. The advantages and disadvantages of the topologies are discussed and analyzed based on the chosen performance metrics. It has been shown that series-resonant input-series output-parallel full-bridge DAB topology exhibits the highest efficiency while the active neutral point clamped (ANPC) DAB topology can be designed with the lowest cost. However, considering a fair trade-off between all the performance metrics, series-resonant ANPC DAB topology is shown to be the best design choice for the considered evaluation conditions.

   Power Loss Modelling of GaN HEMT-based 3L-ANPC Three-Phase Inverter for different PWM Techniques
By Mario CACCIATO [View]
[Download]

Abstract: The paper presents a straightforward modelling approach to compute the power loss distribution in GaN HEMT-based three-phase and three-level (3L) active neutral point clamped (ANPC) inverters, for different pulse width modulated techniques. Conduction and switching losses averaged over each PWM switching period are analytically computed by starting from the operating conditions of the AC load and data of GaN power devices. The accuracy of the proposed analytical approach is evaluated through a circuit-based power electronics simulation tool, applied to different carrier-based PWM strategies.

EPE 2022 - DS2d: Wide Band Gap Power Electronics
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2022 ECCE Europe - Conference > EPE 2022 - Topic 02: Power Converter Topologies and Design > EPE 2022 - DS2d: Wide Band Gap Power Electronics
	[return to parent folder]

	A 20 kW, 3-level flying capacitor 1500 V inverter with characterized GaN devices for grid-tie applications By Van Sang NGUYEN	[View] [Download]
Abstract: This work presents the static and dynamic characterizations of high voltage GaN power devices (GaN FET 900 V and GaN HEMT 1200 V) in order to implement a 3-level flying capacitor 1500 VDC inverter for high power density grid-tie applications with renewable energy sources such as solar and hydrogen energy. In the first part, the static characterizations are shown for two selected GaN power devices. Then these GaN devices were placed in a double-pulse-test-bench dedicated to the dynamic characterizations intended to observe the switching behaviors of the devices under the nominal voltage and current. Finally, in order to demonstrate the compactness of the converter, these GaN devices were implemented in a 20 kW, 3-level flying capacitor 1500 VDC inverter with the full-custom suitable passive elements of the output filters connected to the 800 VAC 3-phase grid.

	Design and analysis of a voltage clamping active delay control method for series connected SiC MOSFETs By Rui WANG	[View] [Download]
Abstract: Series connection of power devices is an attractive approach to overcome the obstacle of the blocking voltage limitation of a single power device. However, voltage balancing measures should be taken to assure the anticipated performance of series connected power devices. In this paper, based on emerging silicon carbide (SiC) metal-oxide semiconductor field-effect transistors (MOSFETs), a clamping resistor-capacitor-diode circuit-based voltage clamping active delay control method is proposed to improve their voltage balancing performance. Compared with existing active delay control methods which sample the drain-source voltages of SiC MOSFETs as feedbacks, this proposed method utilizes the voltages of clamping capacitors as control criteria, which exhibits two prominent advantages: (1) an accurate model of the system is easier to attain (2) the feedback loop is simpler to design. After detailed demonstration of this method, the corresponding model is established to help determine appropriate control parameters, and experiments finally validate the effectiveness of the proposed method.

	Design Method of a High Frequency GaN-based Half-Bridge with Bottom-Side Cooled Transistors Using Multi-PCB Assembly By Loris PACE	[View] [Download]
Abstract: This paper proposes a Multi-PCB (M-PCB) design of a half-bridge using bottom-side cooled GaN transistors with optimal layout and thermal management. The fabrication process only requires limited technological capabilities and is well-suited for industrial applications. Electrical and thermal performances are evaluated by measurements and simulation and compared with previous works.

	Experimental study of interleaved Y-Inverter performance By Yusuke ENDO	[View] [Download]
Abstract: The Y-Inverter is rapidly gaining popularity as an alternative to the 'dc-boost plus inverter' configuration in motor drive applications. Recently, advantages of designing with multiple interleaved cells per phase, as opposed to simply paralleling devices, have been pointed out and solutions using both coupled and non-coupled inductors have been proposed. This paper presents a detailed experimental benchmark study of the inverter performance when using non-interleaved and interleaved cells; for the interleaved case, both non-coupled and coupled inductors are considered. The results clearly show that interleaving enables an important reduction of the current stress on the output and input filter capacitors, as well as the possibility to design the magnetic components with higher energy density and higher efficiency. Interleaving clearly appears as a superior alternative to the straightforward paralleling of semiconductor devices, when the current ratings are such as to require multiple transistors anyway. Specific differences in the circuit performance optimization potential exist between the case of coupled and non-coupled inductors. Only the interleaved non-coupled case is presented here in detail, with some comparison results. All cases will be dealt with in detail in the final paper.

	Fast Switching Planar Inductance Current Source ZETA Converter with Integrated Common Mode Filter By Benjamin ZACHER	[View] [Download]
Abstract: The ZETA topology provides unique opportunities as a source for current-fed inverter systems. This topology enables coupling of input and output inductor to reduce the current ripple. In this paper, design aspects for a coupled inductor with an integrated common mode filter are described and the advantages to provide a current source characteristic using a ZETA converter are discussed. Relevant parasitic inductances and capacitances are calculated using finite element analysis and analytical models. The behavior of the multiphysics system consisting of electrical and magnetical domain is considered using a numerical system simulation including parasitic elements. This simulation shows good results and is compared to experiments. The experimental setup is using gallium-nitride eHEMT transistors with switching frequencies up to 1 MHz.

	Frequency and modulation index related effects in continuous and discontinuous modulated Y-Inverter for motor-drive applications By Hamzeh J. JABER	[View] [Download]
Abstract: The effect of the pulse-width modulation scheme on the efficiency of a three-phase Y-inverter with a wide range of output voltages and currents is investigated experimentally in this paper. The efficiency measurements obtained while conducting experiments on a GaN-based Y-inverter prototype indicate that no pulse-width modulation scheme results in higher efficiency of the Y-inverter over the entire range of motor operation. In other words, depending on the operating conditions, a discontinuous PWM results in a higher or lower efficiency than a continuous sinusoidal PWM. As a result, there is a chance that using a hybrid modulation strategy will improve the efficiency of the Y-inverter. Furthermore, the distortion effect caused by inappropriate inductor and capacitor value selection is highlighted.

	GaN HEMT and SiC Diode Commutation Cell based Dual-Buck Single-Phase Inverter with Premagnetized Inductors and Negative Gate Driver Turn-off Voltage By Tobias BRINKER	[View] [Download]
Abstract: This paper presents a highly efficient single-phase dual-buck inverter topology for the use in photovoltaic (PV) micro inverters with specific advantages for the application of switching cells composed of Gallium Nitride enhancement-mode high electron mobility transistors (GaN E-HEMTs) and silicon carbide (SiC) diodes. For this inverter topology, the opportunity to use negative gate turn-off voltage without affecting the reverse conduction losses is identified as a significant advantage. The impact of this effect on the switching losses is investigated. Double pulse tests with a hardware prototype were performed, showing a reduction of switching losses for high turn-off currents when negative gate turn-off voltages were applied.

	Implementation options of a fully SiC Buck-CSI for advanced motor drive application By Yonghwa LEE	[View] [Download]
Abstract: This paper discusses the design option for a current source inverter for a 15kW high-speed machine with a wide-band-gap technology-based electric motor drive. Both control and modulation options are considered, as well as the integration of silicon carbide (SiC) bi-directional switches to yield high-performance bi-directional switches, as required by the topology. Recently, by taking advantage of the high-speed switching performance of SiC, a simple and robust control design method without voltage sensing and the Two-Third Modulation (TTM) method, which has the benefit of high efficiency, have been proposed. Based on this recent work, this paper proposes the simplified current-sensor-less controller of the CSI-fed PMSM. Also, this paper compared the characteristics of the TTM with the conventional PWM methods by simulation models.

	Non-parasitic induced transient overvoltage in ANPC topology due to critical switching sequences By Michael GEISS	[View] [Download]
Abstract: This paper describes a semiconductor overvoltage in an Active-Neutral-Point-Clamped Converter(ANPC). This overvoltage occurs in case of inductive load when the output voltage of the ANPCchanges its polarity. In case of a grid inverter this occurs twice per grid period at the voltage zerocrossing. It can be observed in most of the ANPC-based power electronics with classical PWMpatterns and can reach the full DC-Link voltage. Although the ANPC is a well-known and widelyspread topology there has been no particular concern in literature about this effect yet. From our pointof view, the reason for this is a generous semiconductor dimensioning in terms of blocking voltageutilization and the limited energy due to the nature of the overvoltage. Nevertheless, this overvoltagecould become a problem in modern designs when SiC MOSFETs are used, and their Safe OperatingAreas (SOA) are pushed even further to the limits.The shown overvoltage is not a switching overshoot due to parasitic inductances and high switchingspeeds. It cannot be explained by 'hazardous' switching states either.In the following, the emergence is described in detail and a theoretical model is introduced andevaluated by simulations and measurements. Afterwards, methods to avoid the overvoltage are shownand a risk estimation is performed.

	Partial Discharges of Insulated Wires under Impulses from Wide Bandgap Power Electronics By Ting HELMHOLDT-ZHU	[View] [Download]
Abstract: Due to the high voltage slopes from the wide bandgap (WBG) power electronics, which generate highfrequency (HF) electromagnetic noises, the identification of partial discharges (PD) becomes very cumbersome. In this paper, a validated PD detection system is utilized to decouple PD signals from those HF noises. In addition, the influences of different insulation systems, grade of insulated wires, steepness of the voltage slope as well as voltage overshoot because of various cable length on the PD events are also presented.

	Performance Evaluation of SiC-based Isolated Bidirectional DC/DC Converters for Electric Vehicle Charging By Kaushik NARESH KUMAR	[View] [Download]
Abstract: In this paper, six 10 kW DC/DC isolated and bidirectional dual active bridge topologies, supplied by+750/0/-750V three-wire DC bus, are evaluated based on efficiency, loss distribution, volt-amperesemiconductors ratings and normalized cost of SiC MOSFETs for electric vehicle charging applications.The selected topologies are evaluated under the same voltage and power conditions, throughelectrothermal simulations and experiments. The simulation results were verified through experimentsconducted on 5 kW prototypes of four of the considered topologies. The advantages and disadvantages of the topologies are discussed and analyzed based on the chosen performance metrics. It has been shown that series-resonant input-series output-parallel full-bridge DAB topology exhibits the highest efficiency while the active neutral point clamped (ANPC) DAB topology can be designed with the lowest cost. However, considering a fair trade-off between all the performance metrics, series-resonant ANPC DAB topology is shown to be the best design choice for the considered evaluation conditions.

	Power Loss Modelling of GaN HEMT-based 3L-ANPC Three-Phase Inverter for different PWM Techniques By Mario CACCIATO	[View] [Download]
Abstract: The paper presents a straightforward modelling approach to compute the power loss distribution in GaN HEMT-based three-phase and three-level (3L) active neutral point clamped (ANPC) inverters, for different pulse width modulated techniques. Conduction and switching losses averaged over each PWM switching period are analytically computed by starting from the operating conditions of the AC load and data of GaN power devices. The accuracy of the proposed analytical approach is evaluated through a circuit-based power electronics simulation tool, applied to different carrier-based PWM strategies.