EPE 2020 - DS2a-3: Active Devices and Components-3 | ||
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2020 ECCE Europe - Conference > EPE 2020 - Topic 01: Devices, Packaging and System Integration > EPE 2020 - DS2a-3: Active Devices and Components-3 | ||
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![]() | Dynamic Characterization of a SiC-MOSFET Half Bridge in Hard- and Soft-Switching and Investigation of Current Sensing Technologies
By Janine EBERSBERGER | |
Abstract: In this paper, the dynamic characterization of a 1.2 kV SiC-MOSFET half bridge module is presented. At first, the switching behaviour of the MOSFET and its body diode is examined with a double pulse test, also targeting the evaluation of the used current sensing technologies. Afterwards, the soft-switching performance is investigated in a three-phase inverter configuration with a sine-wave output filter.
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![]() | Evaluation of the Imax-fsw-dv/dt Trade-off of High Voltage SiC MOSFETs Based on an Analytical Switching Loss Model
By Anliang HU | |
Abstract: Advanced high voltage (3.3-15kV) SiC MOSFETs have been developed for future medium voltage converters over the past decade due to their superior performance. In order to better understand the operation limits and potential of these devices, this paper evaluates the Imax-fsw-dv/dt trade-off (maximal current-handling capability at a specific switching frequency and at a defined switching speed) for high voltage SiC MOSFETs based on a proposed linearized analytical switching loss model. There, high voltage SiC MOSFETs manufactured by Cree combined with data from literature for scaling are used as reference.
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![]() | Gate stresses and threshold voltage instability in normally-OFF GaN HEMTs
By Jose ORTIZ GONZALEZ | |
Abstract: This paper presents a study of gate stress and threshold voltage instability in commercially available 600/650V GaN high electron mobility transistors (HEMTs). The technologies evaluated are an ohmic gate GaN HEMT and a Schottky gate GaN HEMT. The gate leakage currents have been evaluated for two different gate contact technologies and its temperature dependency is presented. It is shown that the gate leakage current could be a temperature indicator for both technologies evaluated, with a higher temperature sensitivity in the case of the Schottky gate HEMT (showing a sixtyfold increase from 22°C to 150 °C). A novel characterization method based on the third quadrant operation of the device was applied to the two selected GaN HEMTs and the role of temperature, stress level and duration on the threshold voltage instability of GaN HEMTs has been evaluated. The method can capture both the peak shift and transient recovery. The results highlight the clear differences between both gate contact technologies with the Schottky gate HEMT exhibiting higher threshold voltage instability due to gate stress compared to the ohmic gate devices. The Schottky gate HEMT shows a positive threshold voltage shift for a gate stress voltage of 3 V, whereas at 5.5 V the shift is dependent of the stress time. For both HEMTs, the recovery transient after stress removal is accelerated with temperature.
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![]() | Mitigating Drain Source Voltage Oscillation with Low Switching Losses for SiC Power MOSFETs Using FPGA-Controlled Active Gate Driver
By Zheming LI | |
Abstract: In order to improve the switching performance of SiC MOSFETs at turn-off, the drain-source voltageoscillation should be mitigated with low switching losses. To achieve this improvement, an approach,which uses an FPGA-controlled active gate driver with two level switchable gate resistances, isinvestigated and presented in this paper. To ensure the performance of this approach for varyingoperating points in a wide range, three methods are shown and compared to find the best solution.
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![]() | Simplified Calculation of Parasitic Elements and Mutual Couplings of Wide-bandgap Power Semiconductor Modules
By Mohammad ALI | |
Abstract: This paper presents a simplified calculation of parasitic elements (LC) and mutual couplings betweenparasitics of wide-bandgap (WBG) power semiconductor modules, based on analytical equations andon 3D FEM. A simplified parallel plate capacitor is derived from stray fields of different plate surfaces.The simple structures e. g. two parallel round wires with different directions of current, are consideredto calculate the parasitic inductance and the magnetic coupling. The analytical models are verified byANSYS Q3D results. This method includes stray fields of capacitive and inductive parasitic structuresbased on a simplified geometric approach. The package of a SiC-MOSFET half-bridge power moduleis 3D-modeled and the parasitic elements are extracted. The analytical models are verified by numerical results. At last, the influence of parasitic elements and mutual couplings on the switching characteristics is analyzed.
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![]() | Thermal Model Development for SiC MOSFETs Robustness Analysis under Repetitive Short Circuit Tests
By Mario PULVIRENTI | |
Abstract: The aim of this paper is to analyze the SiC MOSFETs behavior under repetitive short circuit tests. In particular, the activity is focused on a deep evaluation of short circuit dynamic by dedicated laboratory measurements conducted at different conditions supported and compared by means of a robust physical model developed by Finite Element Approach (FEA) and Failure Analysis (FA).
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