EPE Association: EPE 1993 - 52 - Dialogue Session DS4.1: DEVICES: CIRCUITS AND DEVICE APPLICATIONS

EPE 1993 - 52 - Dialogue Session DS4.1: DEVICES: CIRCUITS AND DEVICE APPLICATIONS
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 1993 - Conference > EPE 1993 - 52 - Dialogue Session DS4.1: DEVICES: CIRCUITS AND DEVICE APPLICATIONS

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   THE RUGGEDNESS OF PARALLELED POWER MOSFETS
By K. Reinmuth; H. Amann [View]
[Download]

Abstract: The behavior of power MOSFET's under avalanche conditions has been described in a number of papers. However, only single devices were examined. This paper investigates the avalanche action of power MOSFET's connected in parallel. A disadvantage of thjs configuration is that its overall ruggedness is at worst case no greater than that of each individual component. The user has to consider certain boundary conditions when connecting avalanche-resistant components in parallel. For example, it must be ensured that current sharing in the avalanche phase is as symmetrical as possible. This paper also takes a look at the thermal settling effects that occur during the avalanche process.

   DARLINGTON ANALYSIS OF DYNAMIC CURRENT EXCHANGES
By D. Lafore; J. M. Li; J. Arnould [View]
[Download]

Abstract: The Darlington, a bi-polar cascade, is the site of complex current exchanges between the pilot and the main transistor which determine the reliability and possible range of frequencies of this switch. An analysis using both soft modelling and experimentation has provided evidence of the mechanisms inducing these exchanges. These observations provide a basis for developing base drive circuits to extend the frequency range of the component. This paper deals with the experimental part of our studies on darlington and proposes new base drive circuits.

   Power MOSFET Design and Modelling Tool for Power Electronics
By B. Beydoun; H. Tranduc; F. Oms; G. Charitat; P. Rossel; A. Peyre Lavigne [View]
[Download]

Abstract: This paper presents a Power MOSFET' s Design (PMD) tool. Physical properties, layout, technological process data's, and thermal dependence of Vertical MOSFET structure are considered. PMD permits the "a priori" determination of the electrical characteristics of standard and new devices in power electronics circuits.

   OPTIMAL DESIGN OF POWER BIPOLAR TRANSISTOR
By A. Napieralski; M. Grecki [View]
[Download]

Abstract: In this paper the influence of geometrical dimensions on the electrical parameters of the bipolar power transistor is presented. The dimensions of emitter and base fingers have been changed in order to obtain (for the given silicon surface area) optimal performance of the device. The simulations of the typical switching circuit with application of a 2-dimensional physical transistor model were performed. The two-dimensional semiconductor device simulator PASS [4] has been used in the computation. The various physical effects especially important in the case of power devices were taken into account. The power losses during commutation were compared for various structures in order to choose the optimal one.

   CORRELATION BETWEEN TECHNOLOGY AND THE ELECTRICAL CHARACTERISTICS OF A POWER POLYSILICON EMITTER BIPOLAR TRANSISTOR
By P. Austin; J. Caminade; J. L. Sanchez [View]
[Download]

Abstract: The use of polysilicon emitter bipolar transistors permits a greater reduction of the emitter-base saturation current density value, this leading to a significant current gain increase. Our aim is to fabricate a polysilicon emitter bipolar transistor for power application. To do this, the PP-planar junction termination has been optimized to obtain a blocking voltage capability of about 600V. We have studied different polysilicon deposition steps compatible with the technology of power bipolar transistor fabrication and their influence on electrical characteristics.

   DESIGN OF A HIGH SPEED POWER MOSFET DRIVER AND ITS USE IN A HALF-BRIDGE CONVERTER
By R. J. Leedham; R. A. McMahon [View]
[Download]

Abstract: A study of high speed conversion circuits has been conducted to determine the aspects which limit speed and power. This has led to the design and construction of a high speed MOSFET driver, with gate switching times below 10ns. A half bridge, using MOSFETs with these drivers, has been built and demonstrated at a range of frequencies up to 13.8MHz. The half bridge has been adopted as it makes more efficient use of the voltage ratings of power devices than resonant single MOSFET designs, and allows operation in the hundreds of watts from a 400V rail with 500V devices.

   ON-LINE SIMULATION OF THE JUNCTION TEMPERATURE FOR THE THERMAL PROTECTION OF HIGH POWER GATE TURN-OFF THYRISTORS USED IN PULSED DUTY INVERTERS
By T. Bonicelli; R. Öström; P. Baigger; H. P. Timmert [View]
[Download]

Abstract: A new high power (25 MW) amplifier system based on Gate Turn-off Thyristors (GTO's) has been procured to be used as a power amplifier in the control system of the vertical position of the plasma in the JET experiment. The new amplifier is characterised by a nominal duty cycle of 30 s every 600 s. The power dissipation in each GTO can reach peaks of almost 8.1 kW for short periods. The switching frequency of each GTO and the current during the execution of a JET pulse are somewhat unpredictable. lt was therefore felt necessary to provide the power devices with a thermal protection which has to be reasonably accurate in order not to unnecessarily limit the performances of the amplifier. At the same time it should be reasonably simple and cost effective. An on-line simulation/calculation of the junction temperature was therefore studied and adopted: the conduction losses, the turn-on and turn-off losses are taken into account; the direction of the output current together with the knowledge of which GTO's are in the ON status determine if the current is flowing in the GTO's or in the freewheeling diodes. A detailed description of the model used and of the hardware realisation of the simulation is given in the paper.

   A METHOD TO MONITOR THE THERMAL STRESS OF POWER DEVICES FOR DIRECT STATOR FLUX CONTROLLED AC DRIVES
By G. Hörning [View]
[Download]

Abstract: Frequency inverter induction motor drives with direct stator flux and torque control as the Direct Self Control (DSR) of Depenbrock [1] or the method of Takahashi and Noguchi [2] have very short torque response times. A typical feature of these control methods is the irregular switching sequence of the inverter legs within a cycle of the stator frequency. Since the average switching frequency does not consider this, it is not a measure for the thermal stress of the power devices. To protect them against thermal destruction, a method of on-line monitoring is proposed based on a so called "temperature index" and a "window frequency." By observing the values of temperature index and window frequency for each switching element, an overloading is prevented, including possible cases of fault. When temperature index or window frequency are reaching their limits, the inverter can be turned off in time. This ensures a safe operation of the drive. In addition, digital simulation results show an improved operational performance, which can be achieved by this method.

   DESIGN METHODOLOGY & MODELLING OF LOW INDUCTANCE PLANAR BUS STRUCTURES
By G. L. Skibinski; D. M. Divan [View]
[Download]

Abstract: The minimization of undesirable parasitic inductance becomes vitally important given the dual constraints of higher frequency and higher power levels of modern power converters. This paper investigates the impedance of conventional conductor bus configurations and outlines a planar bus approach that results in extremely low inductance over a wide range of operating frequencies.

   Comparison of Semiconductor Device Losses in Hard Switched and Zero Voltage Switched Inverter Systems
By M. Dehmlow; K. Heumann; R. Sommer [View]
[Download]

Abstract: This paper presents a detailed investigation of losses in IGBT modules in hard switched PWM and Zero Voltage Switched Inverter Systems. To measure the semiconductor device losses a one phase test circuit in which the semiconductor devices are stressed in similar way as in a real inverter system is described. The test circuit allows the investigation of the semiconductor devices in a hard switched inverter, an Active Clamped Resonant DC Link Inverter, and an Auxiliary Resonant Commutated Pole Inverter.

   SEMICONDUCTOR POWER MOSFETs DEVICES IN SERIES
By R. Guidini; D. Chatroux; Y. Guyon; D. Lafore [View]
[Download]

Abstract: Presently gas thyratron is used as a switching device in most high power laser systems. Recent advances in power semiconductor development now make these new devices a promising alternative. The advantages of semiconductor solid state switches are long lifetime, no deterioration, very slight jitter, high frequency, low power losses (1). Finally, power semiconductors are more reliable than thyratrons. Consequently new switching systems using semiconductor devices are being studied. Power MOSFETs (2) and IGBTs (3) offer a simpler altemative. The advantages are the simplicity of the driving circuit and their high switching speed. But applications of these devices are limited to maximum voltage, generally up to 1000/1500V. However, fast power switches with voltage ratings much higher than those of single fast switching can be made by connecting these devices in series. This paper presents and discusses the value of the Master/Slave principle series connection. The Master/Slave principle is evaluated with the circuit simulator PSPICE.

   USE OF THE MOSFET CHANNEL REVERSE CONDUCTION IN AN INVERTER FOR SUPPRESSION OF THE INTEGRAL DIODE RECOVERY CURRENT
By J.J. Huselstein; C. Gauthier; C. Glaize [View]
[Download]

Abstract: lf the integral diodes are used as free-wheeling diodes of a MOSFET half-bridge inverter, the reverse recovery current can be high during the transistor integral diode turn-off. It generates important switching losses and can be induced a transistor failure. In this paper, we show how to take advantage of the negative channel conduction in MOSFET to prevent the integral diode conduction and suppress the reverse recovery current. The current is transferred directly from a transistor channel to the opposite one, avoiding the limitation imposed by the diode conduction. This method requires a very fine adjustment of the delay time between the gate drive signals applied to the two transistors to obtain an optimal switching. So, we propose a method to measure the current during the switching which allows the design of a regulation acting on the transistor gate drive signals, so that we can have a switching with a minimal overcurrent transient. The current measurement, when it is integrated into the converter, must be economical, with a large bandwidth. Experimental results showing the reverse recovery current variations and the behaviour of the measurement device integrated into the converter are presented.

EPE 1993 - 52 - Dialogue Session DS4.1: DEVICES: CIRCUITS AND DEVICE APPLICATIONS
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 1993 - Conference > EPE 1993 - 52 - Dialogue Session DS4.1: DEVICES: CIRCUITS AND DEVICE APPLICATIONS
	[return to parent folder]

	THE RUGGEDNESS OF PARALLELED POWER MOSFETS By K. Reinmuth; H. Amann	[View] [Download]
Abstract: The behavior of power MOSFET's under avalanche conditions has been described in a number of papers. However, only single devices were examined. This paper investigates the avalanche action of power MOSFET's connected in parallel. A disadvantage of thjs configuration is that its overall ruggedness is at worst case no greater than that of each individual component. The user has to consider certain boundary conditions when connecting avalanche-resistant components in parallel. For example, it must be ensured that current sharing in the avalanche phase is as symmetrical as possible. This paper also takes a look at the thermal settling effects that occur during the avalanche process.

	DARLINGTON ANALYSIS OF DYNAMIC CURRENT EXCHANGES By D. Lafore; J. M. Li; J. Arnould	[View] [Download]
Abstract: The Darlington, a bi-polar cascade, is the site of complex current exchanges between the pilot and the main transistor which determine the reliability and possible range of frequencies of this switch. An analysis using both soft modelling and experimentation has provided evidence of the mechanisms inducing these exchanges. These observations provide a basis for developing base drive circuits to extend the frequency range of the component. This paper deals with the experimental part of our studies on darlington and proposes new base drive circuits.

	Power MOSFET Design and Modelling Tool for Power Electronics By B. Beydoun; H. Tranduc; F. Oms; G. Charitat; P. Rossel; A. Peyre Lavigne	[View] [Download]
Abstract: This paper presents a Power MOSFET' s Design (PMD) tool. Physical properties, layout, technological process data's, and thermal dependence of Vertical MOSFET structure are considered. PMD permits the "a priori" determination of the electrical characteristics of standard and new devices in power electronics circuits.

	OPTIMAL DESIGN OF POWER BIPOLAR TRANSISTOR By A. Napieralski; M. Grecki	[View] [Download]
Abstract: In this paper the influence of geometrical dimensions on the electrical parameters of the bipolar power transistor is presented. The dimensions of emitter and base fingers have been changed in order to obtain (for the given silicon surface area) optimal performance of the device. The simulations of the typical switching circuit with application of a 2-dimensional physical transistor model were performed. The two-dimensional semiconductor device simulator PASS [4] has been used in the computation. The various physical effects especially important in the case of power devices were taken into account. The power losses during commutation were compared for various structures in order to choose the optimal one.

	CORRELATION BETWEEN TECHNOLOGY AND THE ELECTRICAL CHARACTERISTICS OF A POWER POLYSILICON EMITTER BIPOLAR TRANSISTOR By P. Austin; J. Caminade; J. L. Sanchez	[View] [Download]
Abstract: The use of polysilicon emitter bipolar transistors permits a greater reduction of the emitter-base saturation current density value, this leading to a significant current gain increase. Our aim is to fabricate a polysilicon emitter bipolar transistor for power application. To do this, the PP-planar junction termination has been optimized to obtain a blocking voltage capability of about 600V. We have studied different polysilicon deposition steps compatible with the technology of power bipolar transistor fabrication and their influence on electrical characteristics.

	DESIGN OF A HIGH SPEED POWER MOSFET DRIVER AND ITS USE IN A HALF-BRIDGE CONVERTER By R. J. Leedham; R. A. McMahon	[View] [Download]
Abstract: A study of high speed conversion circuits has been conducted to determine the aspects which limit speed and power. This has led to the design and construction of a high speed MOSFET driver, with gate switching times below 10ns. A half bridge, using MOSFETs with these drivers, has been built and demonstrated at a range of frequencies up to 13.8MHz. The half bridge has been adopted as it makes more efficient use of the voltage ratings of power devices than resonant single MOSFET designs, and allows operation in the hundreds of watts from a 400V rail with 500V devices.

	ON-LINE SIMULATION OF THE JUNCTION TEMPERATURE FOR THE THERMAL PROTECTION OF HIGH POWER GATE TURN-OFF THYRISTORS USED IN PULSED DUTY INVERTERS By T. Bonicelli; R. Öström; P. Baigger; H. P. Timmert	[View] [Download]
Abstract: A new high power (25 MW) amplifier system based on Gate Turn-off Thyristors (GTO's) has been procured to be used as a power amplifier in the control system of the vertical position of the plasma in the JET experiment. The new amplifier is characterised by a nominal duty cycle of 30 s every 600 s. The power dissipation in each GTO can reach peaks of almost 8.1 kW for short periods. The switching frequency of each GTO and the current during the execution of a JET pulse are somewhat unpredictable. lt was therefore felt necessary to provide the power devices with a thermal protection which has to be reasonably accurate in order not to unnecessarily limit the performances of the amplifier. At the same time it should be reasonably simple and cost effective. An on-line simulation/calculation of the junction temperature was therefore studied and adopted: the conduction losses, the turn-on and turn-off losses are taken into account; the direction of the output current together with the knowledge of which GTO's are in the ON status determine if the current is flowing in the GTO's or in the freewheeling diodes. A detailed description of the model used and of the hardware realisation of the simulation is given in the paper.

	A METHOD TO MONITOR THE THERMAL STRESS OF POWER DEVICES FOR DIRECT STATOR FLUX CONTROLLED AC DRIVES By G. Hörning	[View] [Download]
Abstract: Frequency inverter induction motor drives with direct stator flux and torque control as the Direct Self Control (DSR) of Depenbrock [1] or the method of Takahashi and Noguchi [2] have very short torque response times. A typical feature of these control methods is the irregular switching sequence of the inverter legs within a cycle of the stator frequency. Since the average switching frequency does not consider this, it is not a measure for the thermal stress of the power devices. To protect them against thermal destruction, a method of on-line monitoring is proposed based on a so called "temperature index" and a "window frequency." By observing the values of temperature index and window frequency for each switching element, an overloading is prevented, including possible cases of fault. When temperature index or window frequency are reaching their limits, the inverter can be turned off in time. This ensures a safe operation of the drive. In addition, digital simulation results show an improved operational performance, which can be achieved by this method.

	DESIGN METHODOLOGY & MODELLING OF LOW INDUCTANCE PLANAR BUS STRUCTURES By G. L. Skibinski; D. M. Divan	[View] [Download]
Abstract: The minimization of undesirable parasitic inductance becomes vitally important given the dual constraints of higher frequency and higher power levels of modern power converters. This paper investigates the impedance of conventional conductor bus configurations and outlines a planar bus approach that results in extremely low inductance over a wide range of operating frequencies.

	Comparison of Semiconductor Device Losses in Hard Switched and Zero Voltage Switched Inverter Systems By M. Dehmlow; K. Heumann; R. Sommer	[View] [Download]
Abstract: This paper presents a detailed investigation of losses in IGBT modules in hard switched PWM and Zero Voltage Switched Inverter Systems. To measure the semiconductor device losses a one phase test circuit in which the semiconductor devices are stressed in similar way as in a real inverter system is described. The test circuit allows the investigation of the semiconductor devices in a hard switched inverter, an Active Clamped Resonant DC Link Inverter, and an Auxiliary Resonant Commutated Pole Inverter.

	SEMICONDUCTOR POWER MOSFETs DEVICES IN SERIES By R. Guidini; D. Chatroux; Y. Guyon; D. Lafore	[View] [Download]
Abstract: Presently gas thyratron is used as a switching device in most high power laser systems. Recent advances in power semiconductor development now make these new devices a promising alternative. The advantages of semiconductor solid state switches are long lifetime, no deterioration, very slight jitter, high frequency, low power losses (1). Finally, power semiconductors are more reliable than thyratrons. Consequently new switching systems using semiconductor devices are being studied. Power MOSFETs (2) and IGBTs (3) offer a simpler altemative. The advantages are the simplicity of the driving circuit and their high switching speed. But applications of these devices are limited to maximum voltage, generally up to 1000/1500V. However, fast power switches with voltage ratings much higher than those of single fast switching can be made by connecting these devices in series. This paper presents and discusses the value of the Master/Slave principle series connection. The Master/Slave principle is evaluated with the circuit simulator PSPICE.

	USE OF THE MOSFET CHANNEL REVERSE CONDUCTION IN AN INVERTER FOR SUPPRESSION OF THE INTEGRAL DIODE RECOVERY CURRENT By J.J. Huselstein; C. Gauthier; C. Glaize	[View] [Download]
Abstract: lf the integral diodes are used as free-wheeling diodes of a MOSFET half-bridge inverter, the reverse recovery current can be high during the transistor integral diode turn-off. It generates important switching losses and can be induced a transistor failure. In this paper, we show how to take advantage of the negative channel conduction in MOSFET to prevent the integral diode conduction and suppress the reverse recovery current. The current is transferred directly from a transistor channel to the opposite one, avoiding the limitation imposed by the diode conduction. This method requires a very fine adjustment of the delay time between the gate drive signals applied to the two transistors to obtain an optimal switching. So, we propose a method to measure the current during the switching which allows the design of a regulation acting on the transistor gate drive signals, so that we can have a switching with a minimal overcurrent transient. The current measurement, when it is integrated into the converter, must be economical, with a large bandwidth. Experimental results showing the reverse recovery current variations and the behaviour of the measurement device integrated into the converter are presented.