| Abstract |
The behavior of power MOSFET's under avalanche conditions has been described in a number of papers. However, only single devices were examined. This paper investigates the avalanche action of power MOSFET's connected in parallel. A disadvantage of thjs configuration is that its overall ruggedness is at worst case no greater than that of each individual component. The user has to consider certain boundary conditions when connecting avalanche-resistant components in parallel. For example, it must be ensured that current sharing in the avalanche phase is as symmetrical as possible. This paper also takes a look at the thermal settling effects that occur during the avalanche process. |
