EPE Association: EPE 2003 - Topic 02a: Thermal Mechatronics

EPE 2003 - Topic 02a: Thermal Mechatronics
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2003 - Conference > EPE 2003 - Topic 02: POWER ELECTRONIC SYSTEM DESIGN & PACKAGING > EPE 2003 - Topic 02a: Thermal Mechatronics

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   Comparison of simulation and measurement of thermal resistance of copper area on a PCB in combination with surface mounted or dual interline power packages
By W. Frank [View]
[Download]

Abstract: The trend of smaller size of switch mode power supplies leads to higher content of SMD packages or integrated solutions (control-IC and MOSFET in one package). Therefore thermal management concepts are getting more and more into the focus of design engineers. A very simple thermal concept is the use of a copper area surrounding the drain pins of the package. The paper describes two different methods of evaluating the thermal junction-ambient resistance for through-hole and SMD parts (PDSO-16, TO-252 and DIP-8) having various copper areas. It compares the results of a Finite Element Method (FEM) and of a empirical method using the socalled “Delta-VSD”-method. Each of those packages are combined with a copper area of 0 mm², 150 mm², 300 mm², 450 mm² and 600 mm² and the paper gives recommendations for the package selection.

   Reduced models for the temperature control of multichip power devices
By C. Rouaud; P. Lagonotte; A. Alexandre [View]
[Download]

Abstract: Increasing power dissipations and reducing chip’s size generate great thermal stresses within electronic module. Thus, the need for having accurate and fast simulating thermal models is increasing. This paper presents a new methodology for obtaining reduced thermal models of power devices. The application of such reduced models can be electro-thermal models, thermo-mechanical simulations, real-time control of the junction temperature of IGBTs and FWDs.

EPE 2003 - Topic 02a: Thermal Mechatronics
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2003 - Conference > EPE 2003 - Topic 02: POWER ELECTRONIC SYSTEM DESIGN & PACKAGING > EPE 2003 - Topic 02a: Thermal Mechatronics
	[return to parent folder]

	Comparison of simulation and measurement of thermal resistance of copper area on a PCB in combination with surface mounted or dual interline power packages By W. Frank	[View] [Download]
Abstract: The trend of smaller size of switch mode power supplies leads to higher content of SMD packages or integrated solutions (control-IC and MOSFET in one package). Therefore thermal management concepts are getting more and more into the focus of design engineers. A very simple thermal concept is the use of a copper area surrounding the drain pins of the package. The paper describes two different methods of evaluating the thermal junction-ambient resistance for through-hole and SMD parts (PDSO-16, TO-252 and DIP-8) having various copper areas. It compares the results of a Finite Element Method (FEM) and of a empirical method using the socalled “Delta-VSD”-method. Each of those packages are combined with a copper area of 0 mm², 150 mm², 300 mm², 450 mm² and 600 mm² and the paper gives recommendations for the package selection.

	Reduced models for the temperature control of multichip power devices By C. Rouaud; P. Lagonotte; A. Alexandre	[View] [Download]
Abstract: Increasing power dissipations and reducing chip’s size generate great thermal stresses within electronic module. Thus, the need for having accurate and fast simulating thermal models is increasing. This paper presents a new methodology for obtaining reduced thermal models of power devices. The application of such reduced models can be electro-thermal models, thermo-mechanical simulations, real-time control of the junction temperature of IGBTs and FWDs.