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   Comparison of simulation and measurement of thermal resistance of copper area on a PCB in combination with surface mounted or dual interline power packages   [View] 
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 Author(s)   W. Frank 
 Abstract   The trend of smaller size of switch mode power supplies leads to higher content of SMD packages or integrated solutions (control-IC and MOSFET in one package). Therefore thermal management concepts are getting more and more into the focus of design engineers. A very simple thermal concept is the use of a copper area surrounding the drain pins of the package. The paper describes two different methods of evaluating the thermal junction-ambient resistance for through-hole and SMD parts (PDSO-16, TO-252 and DIP-8) having various copper areas. It compares the results of a Finite Element Method (FEM) and of a empirical method using the socalled “Delta-VSD”-method. Each of those packages are combined with a copper area of 0 mm², 150 mm², 300 mm², 450 mm² and 600 mm² and the paper gives recommendations for the package selection. 
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Filename:EPE2003-PP0324 - Frank
Filesize:314.8 KB
 Type   Members Only 
 Date   Last modified 2003-10-14 by Unknown