EPE Association: EPE 2025 - DS2m: Converter Design and Optimisation

EPE 2025 - DS2m: Converter Design and Optimisation
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2025 - Conference > EPE 2025 - Topic 10: Converter Modelling, Design and Low-level Control > EPE 2025 - DS2m: Converter Design and Optimisation

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   Multi-objective Optimization based Design of 3-L Inverters Considering an Extensive WBG Semiconductors Library
By Meriem OUZOUIGH, Timothé DELAFORGE, Alain LACARNOY, Vinicius KREMER, Jean-Luc SCHANEN [View]
[Download]

Abstract: This paper presents a comparative analysis of the performance of 3-Level DC/AC inverter topologies in terms of price, loss, and volume. An extensive library of commercially available SiC and GaN semiconductors was implemented to create performance maps for the 3-L topologies across various power levels, aiding power electronics engineers in making informed topology design decisions.The analysis employs a highly precise design-by-optimization methodology to derive the optimal Pareto front for each topology. To ensure a fair comparison and minimize expert bias, all degrees of freedom were retained, and no design rules were imposed during the design flow. The optimization results provide quantitative insights into the enhanced capabilities of 3-L inverters utilizing WBG technology.

   Multi-Objective PSO for the Sizing of a 12-Pulse Diode Rectifier : A Comparative Analysis at Room and Cryogenic Temperatures
By Yasmine BAAZIZI, Ana Luiza HAAS BEZERRA, Lauro FERREIRA, Simon MEUNIER, Tanguy PHULPIN, Loïc QUÉVAL [View]
[Download]

Abstract: This paper compares the optimal sizing of a 12-pulse diode rectifier operating at room temperature (293 K) and at cryogenic temperature (77 K). First, a diode database is constructed from diode measurements at both temperatures. Then, using the PSO (Particle Swarm Optimization) algorithm, the converters are sized to maximise efficiency and minimise volume. The results show that the converter designed to operate at 77 K achieves efficiency levels comparable to those at 293 K (without cooling penalty). However, the cryogenic design offers significant volume advantages over the room temperature design, making it particularly beneficial for applications where volume and weight are limited.

   Two copper layer Insulated Metal Substrate PCB potential using Wide-Bandgap semiconductors
By Macia CAPO-LLITERAS, Pau MORENO-RUBIO, Daniel HEREDERO-PERIS, Daniel MONTESINOS-MIRACLE [View]
[Download]

Abstract: This paper evaluates two copper-layer Insulated Metal Substrate (IMS) PCBs for power converters, highlighting reduced parasitic inductance and strong thermal performance. It compares various layouts, considering parasitic capacitance, inductance, thermal resistance, and power density, demonstrating exceptional performance in a 4 kVA half-bridge with a 400 V dc-link design.

EPE 2025 - DS2m: Converter Design and Optimisation
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2025 - Conference > EPE 2025 - Topic 10: Converter Modelling, Design and Low-level Control > EPE 2025 - DS2m: Converter Design and Optimisation
	[return to parent folder]

	Multi-objective Optimization based Design of 3-L Inverters Considering an Extensive WBG Semiconductors Library By Meriem OUZOUIGH, Timothé DELAFORGE, Alain LACARNOY, Vinicius KREMER, Jean-Luc SCHANEN	[View] [Download]
Abstract: This paper presents a comparative analysis of the performance of 3-Level DC/AC inverter topologies in terms of price, loss, and volume. An extensive library of commercially available SiC and GaN semiconductors was implemented to create performance maps for the 3-L topologies across various power levels, aiding power electronics engineers in making informed topology design decisions.The analysis employs a highly precise design-by-optimization methodology to derive the optimal Pareto front for each topology. To ensure a fair comparison and minimize expert bias, all degrees of freedom were retained, and no design rules were imposed during the design flow. The optimization results provide quantitative insights into the enhanced capabilities of 3-L inverters utilizing WBG technology.

	Multi-Objective PSO for the Sizing of a 12-Pulse Diode Rectifier : A Comparative Analysis at Room and Cryogenic Temperatures By Yasmine BAAZIZI, Ana Luiza HAAS BEZERRA, Lauro FERREIRA, Simon MEUNIER, Tanguy PHULPIN, Loïc QUÉVAL	[View] [Download]
Abstract: This paper compares the optimal sizing of a 12-pulse diode rectifier operating at room temperature (293 K) and at cryogenic temperature (77 K). First, a diode database is constructed from diode measurements at both temperatures. Then, using the PSO (Particle Swarm Optimization) algorithm, the converters are sized to maximise efficiency and minimise volume. The results show that the converter designed to operate at 77 K achieves efficiency levels comparable to those at 293 K (without cooling penalty). However, the cryogenic design offers significant volume advantages over the room temperature design, making it particularly beneficial for applications where volume and weight are limited.

	Two copper layer Insulated Metal Substrate PCB potential using Wide-Bandgap semiconductors By Macia CAPO-LLITERAS, Pau MORENO-RUBIO, Daniel HEREDERO-PERIS, Daniel MONTESINOS-MIRACLE	[View] [Download]
Abstract: This paper evaluates two copper-layer Insulated Metal Substrate (IMS) PCBs for power converters, highlighting reduced parasitic inductance and strong thermal performance. It compares various layouts, considering parasitic capacitance, inductance, thermal resistance, and power density, demonstrating exceptional performance in a 4 kVA half-bridge with a 400 V dc-link design.