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   Multi-objective Optimization based Design of 3-L Inverters Considering an Extensive WBG Semiconductors Library   [View] 
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 Author(s)   Meriem OUZOUIGH, Timothé DELAFORGE, Alain LACARNOY, Vinicius KREMER, Jean-Luc SCHANEN 
 Abstract   This paper presents a comparative analysis of the performance of 3-Level DC/AC inverter topologies in terms of price, loss, and volume. An extensive library of commercially available SiC and GaN semiconductors was implemented to create performance maps for the 3-L topologies across various power levels, aiding power electronics engineers in making informed topology design decisions.The analysis employs a highly precise design-by-optimization methodology to derive the optimal Pareto front for each topology. To ensure a fair comparison and minimize expert bias, all degrees of freedom were retained, and no design rules were imposed during the design flow. The optimization results provide quantitative insights into the enhanced capabilities of 3-L inverters utilizing WBG technology. 
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Filename:0157-epe2025-full-11070924.pdf
Filesize:3.744 MB
 Type   Members Only 
 Date   Last modified 2025-08-31 by System