EPE Association: EPE 1989 - 26 - Lecture Session 3.9: ELECTRONIC POWER ACTUATORS

EPE 1989 - 26 - Lecture Session 3.9: ELECTRONIC POWER ACTUATORS
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 1989 - Conference > EPE 1989 - 26 - Lecture Session 3.9: ELECTRONIC POWER ACTUATORS

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   VERSATILITY OF PWM INVERTER: HARMONIC FILTERING, NON LINEAR LOAD, NON POLLUTING RECTIFICATION AND / OR STATIC VAR COMPENSATION
By C. Elisabelar; Y. Cheron; H. Piquet; M. Binet [View]
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Abstract: In static power conversion, some command parameters act directly on the operating point of the power-supply-converter-load system and they allow the fundamental terms control (amplitude, frequency, phase). The others have a minimum influence on the operating point, but they allow the harmonic spectrum control. Particularly, using the well known PWM inverter structure, the authors show its versatility and make a review of all its applications. At first, the PWM inverter in DC/AC conversion, with fundamental voltage control, harmonic reduction, non linear load feeding. Then, the PWM inverter in AC/DC conversion, acting as a rectifier with sinusoidal input currents, power factor control, VAR and/or harmonic compensation. Lastly, some experimental results are given and the AC/AC conversion is examined.

   ACCOMODATING PARASITIC EFFECTS IN HIGH-FREQUENCY POWER-STAGES
By F. V. P. Robinson; B. W. Williams [View]
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Abstract: RC-snubber optimization still contains a large degree of empiricism because assumptions about device current-fail and snubber-component parasitic effects are imprecise. This becomes evident when applying small RC-snubbers to medium frequency (10-100kHz) MOSFET and IGBT power-stages, where snubber capacitance may approach device output-capacitance and where low-cost snubber-resistor parasitic inductance often exceeds the inductance being clamped. Methods of overcoming these and other difficulties, associated with very fast transient suppression, are presented, together with a re-assessment of existing RC-snubber optimization methods.

   G.T.O.-CONVERTERS ABOVE 30 kHz WITH RESONANT INPUT LINKS AS POWER FILTERS
By I. Smit; J. D. Van Wyk; J. J. Schoeman [View]
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Abstract: Resonant link voltage fed converters have recently been shown to have several advantages. The problems with using these topologies lie in higher voltage stresses, leading to GTO's as a feasible device family. However, the discrete pulse nature of the output of these converters necessitates an operation of the resonant link at frequencies much higher than the eventual pwm-frequency of the converter. lt has been believed, that due to tail current losses, GTO's are unsuitable for this. The paper shows that by optimisation of the resonant link for minimum loss, the converter can be operated at very high frequency without the expected loss penalty and then appIies these concepts to the study of the single bridge-arm topology as the building block for an dynamic power filter that can operate on power systems.

   SOME ASPECTS OF THE CIRCUIT DESIGN OF HIGH POWER GTO CONVERTERS
By Wolfgang Runge; Andreas Steimel [View]
[Download]

Abstract: In the field of high power converter, e.g. for traction applications, GTO-thyristors with ratings up to 4.5 kV and 2.5 kA are going to be introduced. The circuit design of GTO converters is determined by the snubber circuits, which are neceasary to release the GTOs from turn-on and turn-off switching losses and to keep the overvoltages caused by GTO switching low. Two snubber arrangements are discussed: the "RCD" snubber together with the di/dt limiting chokes and the unsymmetrical "U" snubber with one common snubber capacitor for a pair of GTOs. Concerning the overvoltage due to switching the same equivalent circuit can be derived for both arrangements. The losses due to the energy stored in the snubber elements are considerably reduced by the U-snubber circuit. The switching losses of high power GTOs are rather high: the turn-on losses are reduced by the U-circuit. The circuit design of the whole inverter and of the arrangement and layout of the di/dt limiting inductors is disscussed. Some measuring results and data of inverters are given.

EPE 1989 - 26 - Lecture Session 3.9: ELECTRONIC POWER ACTUATORS
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 1989 - Conference > EPE 1989 - 26 - Lecture Session 3.9: ELECTRONIC POWER ACTUATORS
	[return to parent folder]

	VERSATILITY OF PWM INVERTER: HARMONIC FILTERING, NON LINEAR LOAD, NON POLLUTING RECTIFICATION AND / OR STATIC VAR COMPENSATION By C. Elisabelar; Y. Cheron; H. Piquet; M. Binet	[View] [Download]
Abstract: In static power conversion, some command parameters act directly on the operating point of the power-supply-converter-load system and they allow the fundamental terms control (amplitude, frequency, phase). The others have a minimum influence on the operating point, but they allow the harmonic spectrum control. Particularly, using the well known PWM inverter structure, the authors show its versatility and make a review of all its applications. At first, the PWM inverter in DC/AC conversion, with fundamental voltage control, harmonic reduction, non linear load feeding. Then, the PWM inverter in AC/DC conversion, acting as a rectifier with sinusoidal input currents, power factor control, VAR and/or harmonic compensation. Lastly, some experimental results are given and the AC/AC conversion is examined.

	ACCOMODATING PARASITIC EFFECTS IN HIGH-FREQUENCY POWER-STAGES By F. V. P. Robinson; B. W. Williams	[View] [Download]
Abstract: RC-snubber optimization still contains a large degree of empiricism because assumptions about device current-fail and snubber-component parasitic effects are imprecise. This becomes evident when applying small RC-snubbers to medium frequency (10-100kHz) MOSFET and IGBT power-stages, where snubber capacitance may approach device output-capacitance and where low-cost snubber-resistor parasitic inductance often exceeds the inductance being clamped. Methods of overcoming these and other difficulties, associated with very fast transient suppression, are presented, together with a re-assessment of existing RC-snubber optimization methods.

	G.T.O.-CONVERTERS ABOVE 30 kHz WITH RESONANT INPUT LINKS AS POWER FILTERS By I. Smit; J. D. Van Wyk; J. J. Schoeman	[View] [Download]
Abstract: Resonant link voltage fed converters have recently been shown to have several advantages. The problems with using these topologies lie in higher voltage stresses, leading to GTO's as a feasible device family. However, the discrete pulse nature of the output of these converters necessitates an operation of the resonant link at frequencies much higher than the eventual pwm-frequency of the converter. lt has been believed, that due to tail current losses, GTO's are unsuitable for this. The paper shows that by optimisation of the resonant link for minimum loss, the converter can be operated at very high frequency without the expected loss penalty and then appIies these concepts to the study of the single bridge-arm topology as the building block for an dynamic power filter that can operate on power systems.

	SOME ASPECTS OF THE CIRCUIT DESIGN OF HIGH POWER GTO CONVERTERS By Wolfgang Runge; Andreas Steimel	[View] [Download]
Abstract: In the field of high power converter, e.g. for traction applications, GTO-thyristors with ratings up to 4.5 kV and 2.5 kA are going to be introduced. The circuit design of GTO converters is determined by the snubber circuits, which are neceasary to release the GTOs from turn-on and turn-off switching losses and to keep the overvoltages caused by GTO switching low. Two snubber arrangements are discussed: the "RCD" snubber together with the di/dt limiting chokes and the unsymmetrical "U" snubber with one common snubber capacitor for a pair of GTOs. Concerning the overvoltage due to switching the same equivalent circuit can be derived for both arrangements. The losses due to the energy stored in the snubber elements are considerably reduced by the U-snubber circuit. The switching losses of high power GTOs are rather high: the turn-on losses are reduced by the U-circuit. The circuit design of the whole inverter and of the arrangement and layout of the di/dt limiting inductors is disscussed. Some measuring results and data of inverters are given.