EPE Association: EPE 2019 - LS2a: Silicon Power Devices

EPE 2019 - LS2a: Silicon Power Devices
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2019 ECCE Europe - Conference > EPE 2019 - Topic 01: Devices, Packaging and System Integration > EPE 2019 - LS2a: Silicon Power Devices

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   Enhancement of Thermo-mechanical Behavior of IGBT Modules through Engineered Threshold Voltages
By Mohsen AKBARI [View]
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Abstract: In this paper, a purposely-imbalanced current density distribution in insulated-gate bipolar transistor(IGBT) chips is introduced to reduce the surface temperature inhomogeneity of standard chipstechnology. The idea is implemented by modifying the gate threshold voltage across the active chiparea, to counteract the uneven temperature distribution of a standard IGBT chip. Coupled thermomechanical analysis realized by finite element method (FEM) is used for validating the engineered IGBT chip via comparing different layouts.

   New Gate Driver for online adjustable switching behavior of Insulated Gate Bipolar Transistors (IGBTs)
By Fabian STAMER [View]
[Download]

Abstract: This paper presents a new gate driver concept that allows an online, open-loop adjustment of the switching behavior of power semiconductors during operation. An inductive impedance instead of an ohmic impedance enables the required adjustable gate current and thus the desired gate voltage curve. The driver can individually adapt the switching behavior of the transistor to each individual switching edge. Thus for example the dv=dt and di=dt can be influenced, whereby the EMI behavior, the reverse recovery rate, the occurring overvoltage or the switching losses can also be influenced. The new gate driver was compared to a conventional resistive gate driver and the measurement results clearly show the advantages of the proposed driver concept.

   Short Circuit Robustness of an Aged High Power IGBT-Module
By Christian BAEUMLER [View]
[Download]

Abstract: The capability of an unused high-power IGBT Module to withstand a short circuit type 1 is most likely given for a duration of tsc = 10 µs at high temperatures _ = 150 °C. If this robustness is maintained for a severely aged device was investigated in this paper. Ageing up to a certain amount of remaining lifetime was realized within a Power Cycling Test (PCT). The PCT conditions were chosen in order to stress the bond wire connections, because it was assumed that the bond wire condition and chip surface metallization are limiting the short circuit capability. The obtained results show that the capability to withstand a short circuit event for a certain duration tSC does not decrease towards End of Life (EoL). However, the critical energy applied during short circuit ESC\_crit without destruction decreases with respect to ageing. One measurement revealed a decrease of short circuit robustness even within the safe operating area (SoA) specified in the datasheet.

   Structure and Switching Behavior Optimization of fast 4.5 kV Press-Pack Diodes
By Zheng ZHI [View]
[Download]

Abstract: There is an increasing demand for high power high voltage diodes. The requirements are for low losses and rugged performance during even under the fastest switching conditions. This paper describes a detailed investigation to optimize the reverse recovery behavior of 4.5 kV Press-Pack diodes under different current commutation slopes up to 15 kA/µs. Controlled axial lifetime and appropriate field stop (FS) profiles were investigated in order to obtain soft recovery behavior at 10\% to 200\% of rated current. Phosphorus diffusion and proton implantation were used in order to discover an appropriate process for manufacturing the field stop structure. In addition, the contributions of varied lifetime adjustments at the anode side of the diode have been analyzed and explained using measurements and simulations.

EPE 2019 - LS2a: Silicon Power Devices
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2019 ECCE Europe - Conference > EPE 2019 - Topic 01: Devices, Packaging and System Integration > EPE 2019 - LS2a: Silicon Power Devices
	[return to parent folder]

	Enhancement of Thermo-mechanical Behavior of IGBT Modules through Engineered Threshold Voltages By Mohsen AKBARI	[View] [Download]
Abstract: In this paper, a purposely-imbalanced current density distribution in insulated-gate bipolar transistor(IGBT) chips is introduced to reduce the surface temperature inhomogeneity of standard chipstechnology. The idea is implemented by modifying the gate threshold voltage across the active chiparea, to counteract the uneven temperature distribution of a standard IGBT chip. Coupled thermomechanical analysis realized by finite element method (FEM) is used for validating the engineered IGBT chip via comparing different layouts.

	New Gate Driver for online adjustable switching behavior of Insulated Gate Bipolar Transistors (IGBTs) By Fabian STAMER	[View] [Download]
Abstract: This paper presents a new gate driver concept that allows an online, open-loop adjustment of the switching behavior of power semiconductors during operation. An inductive impedance instead of an ohmic impedance enables the required adjustable gate current and thus the desired gate voltage curve. The driver can individually adapt the switching behavior of the transistor to each individual switching edge. Thus for example the dv=dt and di=dt can be influenced, whereby the EMI behavior, the reverse recovery rate, the occurring overvoltage or the switching losses can also be influenced. The new gate driver was compared to a conventional resistive gate driver and the measurement results clearly show the advantages of the proposed driver concept.

	Short Circuit Robustness of an Aged High Power IGBT-Module By Christian BAEUMLER	[View] [Download]
Abstract: The capability of an unused high-power IGBT Module to withstand a short circuit type 1 is most likely given for a duration of tsc = 10 µs at high temperatures _ = 150 °C. If this robustness is maintained for a severely aged device was investigated in this paper. Ageing up to a certain amount of remaining lifetime was realized within a Power Cycling Test (PCT). The PCT conditions were chosen in order to stress the bond wire connections, because it was assumed that the bond wire condition and chip surface metallization are limiting the short circuit capability. The obtained results show that the capability to withstand a short circuit event for a certain duration tSC does not decrease towards End of Life (EoL). However, the critical energy applied during short circuit ESC\_crit without destruction decreases with respect to ageing. One measurement revealed a decrease of short circuit robustness even within the safe operating area (SoA) specified in the datasheet.

	Structure and Switching Behavior Optimization of fast 4.5 kV Press-Pack Diodes By Zheng ZHI	[View] [Download]
Abstract: There is an increasing demand for high power high voltage diodes. The requirements are for low losses and rugged performance during even under the fastest switching conditions. This paper describes a detailed investigation to optimize the reverse recovery behavior of 4.5 kV Press-Pack diodes under different current commutation slopes up to 15 kA/µs. Controlled axial lifetime and appropriate field stop (FS) profiles were investigated in order to obtain soft recovery behavior at 10\% to 200\% of rated current. Phosphorus diffusion and proton implantation were used in order to discover an appropriate process for manufacturing the field stop structure. In addition, the contributions of varied lifetime adjustments at the anode side of the diode have been analyzed and explained using measurements and simulations.