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 EPE 2016 - LS3f: Measurement and Control 
 You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2016 ECCE Europe - Conference > EPE 2016 - Topic 03: Measurement and Control > EPE 2016 - LS3f: Measurement and Control 
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   Dynamic of power-GaN-HEMT electrical parameters: why DC characterization might be misleading. 
 By Emmanuel MARCAULT 
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Abstract: Power GaN HEMT components offer very interesting performances (high voltage, high current, low on-resistance, fast switching), but the GaN material has some 'defects' that can lead to carrier trapping, which induces dynamic electrical phenomena. Thereby, static measurement of the GaN HEMT components requires some reconsideration. In this work, we analyze how the typical static electrical parameters evolve as a function of time and how much they deviate from the DC measurements.

 
   On-Line Semiconductor Switching Loss Measurement System for an Advanced Condition Monitoring Concept 
 By Tobias KRONE 
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Abstract: In this paper, an FPGA-based on-line switching loss measurement system for an advanced condition monitoring system is presented. For this purpose, an on-line measurement system for the semiconductor voltage and current transients integrated at the gate-driver voltage level is proposed. This system and the switching loss calculations are verified by experimental results.

 
   Temperature estimation for wire bondings in power semiconductor devices 
 By Bernhard ULLRICH 
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Abstract: The detection of the junction temperature of power electronic devices during operation plays a central role in reliability and thermal management strategies. The on-state voltage as a TSEP (temperature sensitive electrical parameters) has advantages in terms of applicability and sensitivity to other approaches but it is influenced by the terminal connection voltage. This paper will develop a real-time model for the mean temperature of wire bondings.

 
   The Suitability and Challenges of the New 2D-Short Circuit Detection Method for Protecting a High Performance IGBT with a low Vce,sat Value 
 By Stefan HAIN 
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Abstract: For every power semiconductor chip designer, there is a trade-off between reaching a low Vce,sat value and a low desaturation current in order to produce more ruggedness against short circuit failures. If the width of the gate channel of an IGBT is increased, there is a hidden potential that can be used to increase the conduction performance significantly at the expense of an simultaneous higher desaturation current, which makes it impossible to use the desaturation process of the power semiconductor as a short circuit detection method. In order to benefit from the achievable lower Vce,sat values without loosing any tolerance against short circuit failures, a fast short circuit detection method in combination with a fast turn-off reaction is needed. Therefore, this paper presents an innovative short circuit detection technique called 2D - short circuit detection method and discusses the detection performance, the challenges in turning-off a short circuit failure within the raising collector current and the suitability for a short circuit protection for high performance IGBTs with a low Vce,sat value.