EPE Association: EPE 2025 - DS1p: Dielectric and Interconnecting Components - Capacitors, Insulators, Cables, PCBs, Bus Bars

EPE 2025 - DS1p: Dielectric and Interconnecting Components - Capacitors, Insulators, Cables, PCBs, Bus Bars
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2025 - Conference > EPE 2025 - Topic 08: Components linked to Power Electronics > EPE 2025 - DS1p: Dielectric and Interconnecting Components - Capacitors, Insulators, Cables, PCBs, Bus Bars

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   A high voltage, high current transmission-line-pulse testbench for the reliability investigation of deep depletion, metal-insulator-semiconductor trench capacitors
By Camille GILLOT, René ESCOFFIER, Bruno ALLARD, Larry BUFFLE, Frédéric VOIRON [View]
[Download]

Abstract: This paper presents a work-in-progress design of a transmission-line-pulse testbench (TLPTB) for the investigation of the reliability of deep depletion, on-metal insulator semiconductor (MIS) capacitor at wafer level scale.Firstly, we describe the capacitor (DUT) and the targeted application requiring the investigation of reliability: a snubber for wide-band gap (WBG) transistor. Then we explain the capacitor ageing mechanism induced specifically in the snubber application. We need to stress the capacitor repeatedly under high voltage (1000 V) and high current (100 A). The TLPTB is suitable for such stress pattern. The design is based on SPICE simulation prior to a board layout design. The theoretical subsection describes the expected stress sequence. The physical implementation is discussed along with a measurement setup.

   New DC-Link bus bar and capacitors integration for 800V inverter
By Kévin BERNARDINO, Thomas FOUET [View]
[Download]

Abstract: E-mobility faces an increasing need to enhance the performance of electric vehicles (EV). In this context, a project is underway to develop an 800V inverter with high power density. This article focuses on the development of a new DC-Link system, including laminated bus bars, capacitors, and cooling components. The main challenge was meeting capacitance and inductance requirements, within limited volume and thermal limitations of assembled components. This development has resulted in characterized prototypes, validating the results obtained from preliminary simulations. Optimized thermal management ensures the DC-Link temperature is controlled, guaranteeing capacitors lifespan up to 40,000h for an inverter with a nominal voltage up to 900V. This work also includes the Life Cycle Assessment (LCA) of the product, showing that 96\% of the greenhouse gases emitted by the product are produced during its operating phase.

EPE 2025 - DS1p: Dielectric and Interconnecting Components - Capacitors, Insulators, Cables, PCBs, Bus Bars
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2025 - Conference > EPE 2025 - Topic 08: Components linked to Power Electronics > EPE 2025 - DS1p: Dielectric and Interconnecting Components - Capacitors, Insulators, Cables, PCBs, Bus Bars
	[return to parent folder]

	A high voltage, high current transmission-line-pulse testbench for the reliability investigation of deep depletion, metal-insulator-semiconductor trench capacitors By Camille GILLOT, René ESCOFFIER, Bruno ALLARD, Larry BUFFLE, Frédéric VOIRON	[View] [Download]
Abstract: This paper presents a work-in-progress design of a transmission-line-pulse testbench (TLPTB) for the investigation of the reliability of deep depletion, on-metal insulator semiconductor (MIS) capacitor at wafer level scale.Firstly, we describe the capacitor (DUT) and the targeted application requiring the investigation of reliability: a snubber for wide-band gap (WBG) transistor. Then we explain the capacitor ageing mechanism induced specifically in the snubber application. We need to stress the capacitor repeatedly under high voltage (1000 V) and high current (100 A). The TLPTB is suitable for such stress pattern. The design is based on SPICE simulation prior to a board layout design. The theoretical subsection describes the expected stress sequence. The physical implementation is discussed along with a measurement setup.

	New DC-Link bus bar and capacitors integration for 800V inverter By Kévin BERNARDINO, Thomas FOUET	[View] [Download]
Abstract: E-mobility faces an increasing need to enhance the performance of electric vehicles (EV). In this context, a project is underway to develop an 800V inverter with high power density. This article focuses on the development of a new DC-Link system, including laminated bus bars, capacitors, and cooling components. The main challenge was meeting capacitance and inductance requirements, within limited volume and thermal limitations of assembled components. This development has resulted in characterized prototypes, validating the results obtained from preliminary simulations. Optimized thermal management ensures the DC-Link temperature is controlled, guaranteeing capacitors lifespan up to 40,000h for an inverter with a nominal voltage up to 900V. This work also includes the Life Cycle Assessment (LCA) of the product, showing that 96\% of the greenhouse gases emitted by the product are produced during its operating phase.