EPE Association: EPE 2020 - DS1e-2: Wide Bandgap Power Electronics-2

EPE 2020 - DS1e-2: Wide Bandgap Power Electronics-2
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2020 ECCE Europe - Conference > EPE 2020 - Topic 02: Power Converter Topologies and Design > EPE 2020 - DS1e-2: Wide Bandgap Power Electronics-2

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   3D PCB package for GaN inverter leg with low EMC feature
By PAWEL DERKACZ [View]
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Abstract: This paper presents the adaptation of a 3D integration concept previously used with vertical devices to lateral GaN devices. This 3D integration allows to reduce loop inductance, to ensure moresymmetrical design with especially limited Common Mode emission, thanks to a low middle pointstray capacitance. This reduction has been achieved by both working on the power layout andincluding a specific shield between the devices and the heatsink. The performances of this 3D layouthave been verified in comparison with a more conventional 2D implementation, using bothsimulations and measurements.

   A Test Scheme for the Comprehensive Qualification of MMC Submodule Based on 10 kV SiC MOSFETs under High dv/dt
By Xingxuan HUANG [View]
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Abstract: A test scheme is designed to qualify MMC submodules based on 10 kV SiC MOSFETs comprehensively, including thermal design, insulation design, and operation under high dv/dt. In the test scheme, the essential step is the continuous test realized with the proposed ac-dc continuous test circuit with two MMC submodules in series. With the designed modulation scheme, two cascaded submodules are leveraged to generate high dv/dt. The submodule under test has to continuously withstand 2X normal dv/dt of 10 kV SiC MOSFETs, which could occur during the MMC converter operation. Higher dv/dt can also be generated to fully test the submodule. An open loop voltage balancing method is adopted to simplify the continuous test setup. Simulation and experimental results are provided to validate the proposed test scheme.

   All-GaN Bidirectional ANPC-based Resonant DC-DC Converter
By Tino KAHL [View]
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Abstract: This paper presents an isolated all-GaN resonant DC-DC converter using a HV ANPC and a LV full-bridge converter stage. The thermal characteristics and current limits as well as the switching behavior of the commutation cells of both converter stages are discussed. The ANPC-stage is tested with an output power of 1.8 kW operating as LLC converter, and the LV full-bridge is tested up to 27 A in a step-down DC-DC configuration. Measurement results of the resonant all-GaN LLC-converter are discussed and compared with simulation results.

   Switching Loss Estimation Using a Valided Model of 650 V GaN HEMTs
By Joao SOARES DE OLIVEIRA [View]
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Abstract: GaN devices allow building more compact power converters. In order to study these new devices, it is important to measure and estimate switching losses. Therefore, an instrumented PCB is developed including the measurement points needed for this purpose. The parasitic elements of the PCB layout extracted by ANSYS Q3D and the models of the measurement instruments are also included in the simulation model. In this way, by means of a validated model, it is possible to evaluate the losses in an optimized circuit. Simulation and experimental results are presented to validate the simulation approach.

EPE 2020 - DS1e-2: Wide Bandgap Power Electronics-2
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2020 ECCE Europe - Conference > EPE 2020 - Topic 02: Power Converter Topologies and Design > EPE 2020 - DS1e-2: Wide Bandgap Power Electronics-2
	[return to parent folder]

	3D PCB package for GaN inverter leg with low EMC feature By PAWEL DERKACZ	[View] [Download]
Abstract: This paper presents the adaptation of a 3D integration concept previously used with vertical devices to lateral GaN devices. This 3D integration allows to reduce loop inductance, to ensure moresymmetrical design with especially limited Common Mode emission, thanks to a low middle pointstray capacitance. This reduction has been achieved by both working on the power layout andincluding a specific shield between the devices and the heatsink. The performances of this 3D layouthave been verified in comparison with a more conventional 2D implementation, using bothsimulations and measurements.

	A Test Scheme for the Comprehensive Qualification of MMC Submodule Based on 10 kV SiC MOSFETs under High dv/dt By Xingxuan HUANG	[View] [Download]
Abstract: A test scheme is designed to qualify MMC submodules based on 10 kV SiC MOSFETs comprehensively, including thermal design, insulation design, and operation under high dv/dt. In the test scheme, the essential step is the continuous test realized with the proposed ac-dc continuous test circuit with two MMC submodules in series. With the designed modulation scheme, two cascaded submodules are leveraged to generate high dv/dt. The submodule under test has to continuously withstand 2X normal dv/dt of 10 kV SiC MOSFETs, which could occur during the MMC converter operation. Higher dv/dt can also be generated to fully test the submodule. An open loop voltage balancing method is adopted to simplify the continuous test setup. Simulation and experimental results are provided to validate the proposed test scheme.

	All-GaN Bidirectional ANPC-based Resonant DC-DC Converter By Tino KAHL	[View] [Download]
Abstract: This paper presents an isolated all-GaN resonant DC-DC converter using a HV ANPC and a LV full-bridge converter stage. The thermal characteristics and current limits as well as the switching behavior of the commutation cells of both converter stages are discussed. The ANPC-stage is tested with an output power of 1.8 kW operating as LLC converter, and the LV full-bridge is tested up to 27 A in a step-down DC-DC configuration. Measurement results of the resonant all-GaN LLC-converter are discussed and compared with simulation results.

	Switching Loss Estimation Using a Valided Model of 650 V GaN HEMTs By Joao SOARES DE OLIVEIRA	[View] [Download]
Abstract: GaN devices allow building more compact power converters. In order to study these new devices, it is important to measure and estimate switching losses. Therefore, an instrumented PCB is developed including the measurement points needed for this purpose. The parasitic elements of the PCB layout extracted by ANSYS Q3D and the models of the measurement instruments are also included in the simulation model. In this way, by means of a validated model, it is possible to evaluate the losses in an optimized circuit. Simulation and experimental results are presented to validate the simulation approach.