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 EPE 2018 - DS3b: Advanced Power Converter Topologies III 
 You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2018 ECCE Europe - Conference > EPE 2018 - Topic 02: Power Converter Topologies and Design > EPE 2018 - DS3b: Advanced Power Converter Topologies III 
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   A 25 LEVEL MULTILEVEL ASYMMETRICAL INVERTER WITH CA-CA STAGE AND REDUCED NUMBER OF COMPONENTS 
 By Samuel MESQUITA 
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Abstract: This paper proposes a multilevel asymmetrical inverter topology based on the H-bridge topology witha bi-directional switch connected between the switches of one inverter leg and the middle point of theinput DC voltages, resulting in new cell here referred as CHB-as cell. The cascaded association of twoCHB-as cell with appropriate input voltage sources can provide inverter output voltage with up to 25levels. This paper proposes the use of a HB inverter to connect one dc source and a multiwinding transformer as a ca-ca stage to produce the asymmetrical necessary voltages to supply the two CHB-ascells. This proposal increases the converter efficiency and reduces the total number of components,maintaining low total harmonic distortion in output voltage when compared with conventional multilevel converter to produce the same number of levels at the output voltage. Simulations results for a 1 kW, 220 V with load RL are presented and validate the proposed converter with ca-ca stage using optimum switching states. This topology does not require the use of any additional diode bridge.

 
   A Novel High Gain Non-Inverting, Single Switch Configurations of Modified SEPIC DC-DC Converter for High-Voltage/Low-Current Renewable Energy Applications 
 By Sanjeevikumar PADMANABAN 
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Abstract: A non-inverting, single switch with voltage lift switched inductor module high gain configurations ofthe modified SEPIC converter is discussed in the paper for high voltage and low current renewableenergy applications. Based on the VLSI module position, modified SEPIC converter are classified intofour configurations as MSCVLSI - XLL, MSCVLSI - LYL, MSCVLSI - LLZ and MSCVLSI - XYZ. Thegoal of the proposed research is to design a converter with high voltage gain ratio. The key advantageof MSCVLSI configurations is: 1) single switch topologies which have a simple control strategy, 2)continuous input current and non-inverting boosted output voltage. The mathematical analysis andMatlab/Simulink results validate the functionality of four configurations of the modified SEPICconverter.

 
   A Novel Hybrid Buck-L Converter 
 By Ioana-Monica POP-CALIMANU 
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Abstract: A new step-down topology featuring a static conversion ratios that makes it suitable in applications requiring an output voltage slightly lower than the input voltage is proposed. In those conditions the proposed converter still operates at moderate duty cycles exhibiting very good efficiency. Compared to quadratic topologies that are 4th order system the new Buck converter is a second order system, thus allowing for easy loop design using the traditional approaches. A dc analysis is performed and main equations in steady state are provided together with a design example. Then the theoretical considerations are validated by computer simulation and finally the experimental results confirmed the feasibility of the proposed topology.

 
   Active Neutral Point Clamped Resonant DC/DC-Converter in Gallium Nitride Technology 
 By Tino KAHL 
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Abstract: The Active Neutral Point Clamped (ANPC) Converter is a multilevel topology often used in DC/ACconverter applications. The basic structure provides a third voltage level at the output while reducingthe voltage stress of the semiconductor devices. This advantage will be used to build a resonantLLC-DC-DC converter with new GaN power semiconductors in an ANPC structure. Simulation andmeasurement results of the real system are presented.

 
   Characterization and modeling technique of low power air-cooled PEBB modules 
 By André ANDRETA 
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Abstract: This work presents a contribution to the automatic design of modular power converters based on the associations of standardized conversion cells. All conversion cells studied in this work were fabricated, tested and characterized, and statistical models are derived to represent their behavior. These statistical models were based on experimental data to predict with precision the behavior of any power converter built from a large number of identical conversion cells in any type of association. This work focuses on the characterization methodology and the modeling method implemented for low power, air-cooled standard conversion cells along with further details of the automated design method.

 
   Collector-Emitter voltage based one-step commutation for direct three-level matrix converter 
 By Martin LEUBNER 
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Abstract: This paper investigates the improvements regarding the output current distortion, voltage rise and commonmode voltage stress, when applying a collector-emitter voltage based commutation process to adirect three-level matrix converter (DTMC) drive. To analyse this, a new pulse pattern that addresses thevoltage stress at the converter output terminals is derived from the derived from the known direct matrixconverter (DMC) modulation. Based on this a 2/3/4-step input voltage based commutation, a 1/2-stepload-current based commutation and the proposed 1-step uCE-based commutation strategy are compared.Their advantages and disadvantages are discussed regarding experimental results.

 
   Coupled-inductors parameters estimation for a multiphase DC-DC converter size optimization purposes when avoiding co-simulations 
 By Leyla ARIOUA HABAREK 
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Abstract: This study concerns a 60-kW multiphase interleaved boost converter with coupled inductors. Thisconverter is designed for an EV powertrain application where downsizing is strongly required. For thepurpose of performing size optimization process, estimation models for self and mutual inductancesare presented. In addition, total losses (copper and core losses) on the coupled inductors are estimatedin order to minimize them and then increase the converter efficiency. The copper loss is estimated viathe AC resistance model. However, concerning the core loss, a comparative study between the wellknownSteinmetz approach, the Improved Generalized Steinmetz Equation and the losses obtainedusing 3D transient Finite Element calculations is conducted to find the most suitable for theoptimization process. These models are developed to avoid the use of co-simulations inside theoptimization loop.

 
   Investigation of Submodule Capacitor Voltage Fluctuation of a Modular Multilevel Converter under Unbalanced Grid Conditions 
 By Ingmar KAISER 
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Abstract: Unbalanced grid voltages can occur due to grid faults. Using a Modular Multilevel Converter for distributed generation, fault ride through capability has to be ensured. It especially includes the design of the submodule capacitor. Within this paper, the influence of unbalanced grid conditions on submodule capacitor voltage fluctuation is investigated.

 
   Modified Current-fed Quasi Z-source Converter with Reduced Voltage Stress Across SiC Power Devices 
 By Mariusz ZDANOWSKI 
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Abstract: The paper presents a concept of the current-fed bidirectional quasi-Z-source converter with modifiedimpedance network. In a standard topology the voltage across the input diode becomes very highduring the rectifier mode, which causes very high losses and increases cost of the device. Structureof a proposed impedance network is designed to limit the voltage of the capacitors by a factor of twoand, in consequence, voltage stress of the input diode is also lower. The modified current-fed quasiZ-source converter connected to the standard grid (3 x 400 V RMS) is able to operate with SiCSchottky diodes rated at 1200 V. Circuit analysis and simulation study of the standard and modifiedtopology are provided in this paper to show differences and improved performance of the proposedsolution. The system is simulated with models of real power devices - SiC MOSFETs and Schottkydiodes and is clearly seen that voltage across the diodes is less than 800 V. Then, the 6 kVA SiC-basedlaboratory model is also presented and, finally, experiments performed at nominal conditions duringthe inverter mode are shown. The current-fed bidirectional quasi-Z-source converter supplied from400 V DC reaches peak efficiency of 97.6 \% operating at 100 kHz.

 
   Reduction of negative effects of a short circuit through improved converter topology for wind energy applications 
 By Yves HEIN 
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Abstract: This paper presents the effects of semiconductor failures in an Active-Neutral-Point-Clampedconverter on the electrical and mechanical system of a wind turbine. To simulate the effects ofthe various short-circuit cases a simulation model of a wind turbine was developed, consistingof a back-to-back configuration of ANPC converters, a permanent-magnet synchronous machineand a mechanical model of a 3MW wind turbine.

 
   Short Circuit Current Reduction in Hybrid Multilevel Converters for Traction Applications 
 By Till-Mathis PLÖTZ 
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Abstract: The transformer causes a high amount of the overall losses in modern traction drives when operated withlow grid frequency. Besides the increased harmonics, an enhanced transformer with lower losses andthe same size increases the amplitude of the fault current significantly. A hybrid multilevel convertercan reduce the short-circuit current considerably with the internal capacitor voltages. Together with theenhanced output spectrum, the short-circuit current reduction enables the presented hybrid multilevelconverter to be used along with a transformer with reduced leakage inductance.

 
   T-type NPC Inverter with Active Power Decoupling Capability Using Discontinuous Current Mode 
 By Akiyoshi OMOMO 
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Abstract: This paper proposes a power decoupling control method based on a discontinuous current mode fora T-type NPC inverter. In general, additional components such as buffer capacitors and inductors arerequired in order to provide a power decoupling circuit to inverters. These components lead an increasein circuit volume and weight. In the proposed current control method, the power decoupling capabilityis achieved without any additional components. Furthermore, the grid-tied inductor, which is connectedto the output side, is minimized because the discontinuous current mode (DCM) is used for the currentcontrol. As a simulation result, the second order harmonic component of the input current is reduced by90.2\% compared to that without power decoupling control. Then, the proposed power decouplingcontrol is confirmed with a T-type NPC inverter as a prototype. Consequently, the second orderharmonic component of the input current is reduced by 77.1\% compared to that without powerdecoupling control, whereas the output current THD is 3.13\% at 200-W load.