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   Modified Current-fed Quasi Z-source Converter with Reduced Voltage Stress Across SiC Power Devices   [View] 
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 Author(s)   Mariusz ZDANOWSKI 
 Abstract   The paper presents a concept of the current-fed bidirectional quasi-Z-source converter with modifiedimpedance network. In a standard topology the voltage across the input diode becomes very highduring the rectifier mode, which causes very high losses and increases cost of the device. Structureof a proposed impedance network is designed to limit the voltage of the capacitors by a factor of twoand, in consequence, voltage stress of the input diode is also lower. The modified current-fed quasiZ-source converter connected to the standard grid (3 x 400 V RMS) is able to operate with SiCSchottky diodes rated at 1200 V. Circuit analysis and simulation study of the standard and modifiedtopology are provided in this paper to show differences and improved performance of the proposedsolution. The system is simulated with models of real power devices - SiC MOSFETs and Schottkydiodes and is clearly seen that voltage across the diodes is less than 800 V. Then, the 6 kVA SiC-basedlaboratory model is also presented and, finally, experiments performed at nominal conditions duringthe inverter mode are shown. The current-fed bidirectional quasi-Z-source converter supplied from400 V DC reaches peak efficiency of 97.6 \% operating at 100 kHz. 
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Filename:0443-epe2018-full-15443641.pdf
Filesize:1.014 MB
 Type   Members Only 
 Date   Last modified 2019-05-05 by System