EPE Association: EPE 2013 - LS2e: Hardware-in-the-Loop Systems

EPE 2013 - LS2e: Hardware-in-the-Loop Systems
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2013 ECCE Europe - Conference > EPE 2013 - Topic 08: Measurements and sensors > EPE 2013 - LS2e: Hardware-in-the-Loop Systems

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   Laboratory-based test bed of a three terminals DC networks using Power Hardware In the Loop
By Sid-Ali AMAMRA, Frederic COLAS, Xavier GUILLAUD, Pierre RAULT, Nguefeu SAMUEL [View]
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Abstract: In this paper an experimental three stations MTDC power grid mock-up is presented and developed. The experimental platform is intended to combine electrical power components and communication/control equipment with real-time system simulation tools. A Real-Time Simulation (RTS) methodology with Power-Hardware-In-the-Loop (PHIL) capabilities are used to incorporate the transient reaction of the hardware under study without the need for developing a complicated numerical model, while the power system circuit can be purely simulated. A master-slave control strategy was used in the MTDC transmission system to control terminals VSC and some conclusions are drowning from the results of the real-time simulation and experimentation.

   Online estimation of IGBT junction temperature (Tj) using gate-emitter voltage (Vge) at turn-off
By Vinoth Kumar SUNDARAMOORTHY, Enea BIANDA, Iulian NISTOR, Richard BLOCH, Gerold KNAPP, Alexander HEINEMANN [View]
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Abstract: The paper presents a novel method for online estimation of the junction temperature (Tj) of semiconductor chips in IGBT modules, based on evaluating the gate-emitter voltage (Vge) during the IGBT switch off process. It is shown that the Miller plateau width (in the Vge waveform) depend linearly on the junction temperature of the IGBT chips. Hence, a method can be proposed for estimating the junction temperature even during converter operation – without the need of additional thermal sensors or complex Rth network models. A measurement circuit was implemented at gate level to measure the involved time duration and its functionality was demonstrated for different types of IGBT modules.

   PHIL Simulation for Validating Power Management Strategies in All-electric Vehicles
By Iulian MUNTEANU, Antoneta Luliana BRATCU, Seddik BACHA, Adrian FLORESCU, Axel RUMEAU [View]
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Abstract: In this paper a power hardware-in-the-loop (PHIL) structure for testing algorithms for the management of power flows in all-electric vehicles is presented. Its complex structure, comprising both real-time simulators and control structures, covers the entire electromechanical power chain. It is based upon real-time platforms (DSPACE and RT-LAB) interacting with dedicated hardware equipments, thus enabling the replication of driving conditions and driver actions, as well as power sources emulation and DC-link control. Successful real-time tests that validate control algorithms for electrical power flow sharing in a complex all-electrical vehicle have been performed on this platform.

   Review of state-of-the-art solver solutions for HIL simulation of power systems, power electronic and motor drives
By Christian DUFOUR, Jean BELANGER [View]
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Abstract: In this paper, we review state-of-the-art solvers and techniques applicable to HIL simulation of power systems, power electronics and motor drives. These solutions are implemented on CPUs and FPGA computational engines, the first one being preferred for the complex solvers it can handle, the latter one being preferred for its low HIL latency.Several industrial examples are given: Multi-level Modular Converter, HVDC, large motor drives, HEV, PMSM drive on FPGA, Switched Reluctance Drive on FPGA, buck/boost converter on FPGA, phasor-type real-time simulation, etc...

EPE 2013 - LS2e: Hardware-in-the-Loop Systems
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2013 ECCE Europe - Conference > EPE 2013 - Topic 08: Measurements and sensors > EPE 2013 - LS2e: Hardware-in-the-Loop Systems
	[return to parent folder]

	Laboratory-based test bed of a three terminals DC networks using Power Hardware In the Loop By Sid-Ali AMAMRA, Frederic COLAS, Xavier GUILLAUD, Pierre RAULT, Nguefeu SAMUEL	[View] [Download]
Abstract: In this paper an experimental three stations MTDC power grid mock-up is presented and developed. The experimental platform is intended to combine electrical power components and communication/control equipment with real-time system simulation tools. A Real-Time Simulation (RTS) methodology with Power-Hardware-In-the-Loop (PHIL) capabilities are used to incorporate the transient reaction of the hardware under study without the need for developing a complicated numerical model, while the power system circuit can be purely simulated. A master-slave control strategy was used in the MTDC transmission system to control terminals VSC and some conclusions are drowning from the results of the real-time simulation and experimentation.

	Online estimation of IGBT junction temperature (Tj) using gate-emitter voltage (Vge) at turn-off By Vinoth Kumar SUNDARAMOORTHY, Enea BIANDA, Iulian NISTOR, Richard BLOCH, Gerold KNAPP, Alexander HEINEMANN	[View] [Download]
Abstract: The paper presents a novel method for online estimation of the junction temperature (Tj) of semiconductor chips in IGBT modules, based on evaluating the gate-emitter voltage (Vge) during the IGBT switch off process. It is shown that the Miller plateau width (in the Vge waveform) depend linearly on the junction temperature of the IGBT chips. Hence, a method can be proposed for estimating the junction temperature even during converter operation – without the need of additional thermal sensors or complex Rth network models. A measurement circuit was implemented at gate level to measure the involved time duration and its functionality was demonstrated for different types of IGBT modules.

	PHIL Simulation for Validating Power Management Strategies in All-electric Vehicles By Iulian MUNTEANU, Antoneta Luliana BRATCU, Seddik BACHA, Adrian FLORESCU, Axel RUMEAU	[View] [Download]
Abstract: In this paper a power hardware-in-the-loop (PHIL) structure for testing algorithms for the management of power flows in all-electric vehicles is presented. Its complex structure, comprising both real-time simulators and control structures, covers the entire electromechanical power chain. It is based upon real-time platforms (DSPACE and RT-LAB) interacting with dedicated hardware equipments, thus enabling the replication of driving conditions and driver actions, as well as power sources emulation and DC-link control. Successful real-time tests that validate control algorithms for electrical power flow sharing in a complex all-electrical vehicle have been performed on this platform.

	Review of state-of-the-art solver solutions for HIL simulation of power systems, power electronic and motor drives By Christian DUFOUR, Jean BELANGER	[View] [Download]
Abstract: In this paper, we review state-of-the-art solvers and techniques applicable to HIL simulation of power systems, power electronics and motor drives. These solutions are implemented on CPUs and FPGA computational engines, the first one being preferred for the complex solvers it can handle, the latter one being preferred for its low HIL latency.Several industrial examples are given: Multi-level Modular Converter, HVDC, large motor drives, HEV, PMSM drive on FPGA, Switched Reluctance Drive on FPGA, buck/boost converter on FPGA, phasor-type real-time simulation, etc...