EPE Association: EPE 2007 - Subtopic 05-1 - LS: Control of multilevel converters

EPE 2007 - Subtopic 05-1 - LS: Control of multilevel converters
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2007 - Conference > EPE 2007 - Topic 05: 'Hard switching converters and control' > EPE 2007 - Subtopic 05-1 - LS: Control of multilevel converters

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   A new stacked NPC converter: 3L-topology and control
By FLORICAU Dan; GATEAU Guillaume; TEODORESCU Remus; DUMITRESCU Mariana [View]
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Abstract: In this paper a new three-level (3L) voltage source converter is presented. This new topology called Stacked Neutral Point Clamped (3L-SNPC) increases the apparent switching frequency compared with other 3L structures (3L-Stacked Cells, 3L-Neutral Point Clamped and 3L-Active NPC). This advantage leads to a better balancing of total losses in power switches under all specified operating conditions (low or high modulation index). The topology has more degrees of freedom and allows a parallel conversion. The load current passes simultaneously or alternatively through two parallel paths, depending on PWM strategy. In the paper three PWM strategies are proposed and their switching states and commutations are analyzed. The total losses in power switches are calculated and compared to the most popular 3L structures. Experimental and simulation results are illustrated in the paper to confirm the operation of the proposed topology.

   Carrier PWM Algorithm For Multi-leg Multilevel Inverters
By NHO Nguyen Van; LEE Hong-Hee [View]
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Abstract: This paper presents a universal carrier based PWM method for multileg multilevel inverter on consideration of unbalanced dc voltage sources. Switching time diagram of PWM control in multilevel inverter can be transformed into a nominal switching two-level diagram. It will be shown the correlation between space vector PWM and carrier based PWM methods. As a result, space vector PWM and carrier based PWM methods are only two approaches for implementing defined switching state sequences in multileg multilevel inverters. The described generalized PWM approach for multileg multilevel inverters can be properly applied to different inverter topologies without difficulties. The proposed method is based on modifying of the modulating signals, depending on the dc-source variation. The additional common mode voltage can be designed for obtaining required PWM performance.

   Reduction of common mode currents generated by three-level inverters with consideration of motor overvoltages
By BAUDESSON Philippe; LE MOIGNE Philippe; IDIR Nadir; FRANCHAUD Jean-Jacques; VIDET Arnaud [View]
[Download]

Abstract: In adjustable speed drive applications, the switching of the inverter semiconductors generates common mode currents as well as harmful overvoltages on the motor terminals when long cables are used. Consequently, bulky and expensive input and output filters must be used. This work aims at reducing these disturbances from their origin by using a three-level neutral-point-clamped (NPC) inverter controlled with a new pulse-width-modulation (PWM) strategy. Whereas previous common mode noise-reducing strategies usually generate higher overvoltages than conventional ones, the proposed PWM is able to manage both problems thanks to its internal degrees of freedom.

EPE 2007 - Subtopic 05-1 - LS: Control of multilevel converters
You are here: EPE Documents > 01 - EPE & EPE ECCE Conference Proceedings > EPE 2007 - Conference > EPE 2007 - Topic 05: 'Hard switching converters and control' > EPE 2007 - Subtopic 05-1 - LS: Control of multilevel converters
	[return to parent folder]

	A new stacked NPC converter: 3L-topology and control By FLORICAU Dan; GATEAU Guillaume; TEODORESCU Remus; DUMITRESCU Mariana	[View] [Download]
Abstract: In this paper a new three-level (3L) voltage source converter is presented. This new topology called Stacked Neutral Point Clamped (3L-SNPC) increases the apparent switching frequency compared with other 3L structures (3L-Stacked Cells, 3L-Neutral Point Clamped and 3L-Active NPC). This advantage leads to a better balancing of total losses in power switches under all specified operating conditions (low or high modulation index). The topology has more degrees of freedom and allows a parallel conversion. The load current passes simultaneously or alternatively through two parallel paths, depending on PWM strategy. In the paper three PWM strategies are proposed and their switching states and commutations are analyzed. The total losses in power switches are calculated and compared to the most popular 3L structures. Experimental and simulation results are illustrated in the paper to confirm the operation of the proposed topology.

	Carrier PWM Algorithm For Multi-leg Multilevel Inverters By NHO Nguyen Van; LEE Hong-Hee	[View] [Download]
Abstract: This paper presents a universal carrier based PWM method for multileg multilevel inverter on consideration of unbalanced dc voltage sources. Switching time diagram of PWM control in multilevel inverter can be transformed into a nominal switching two-level diagram. It will be shown the correlation between space vector PWM and carrier based PWM methods. As a result, space vector PWM and carrier based PWM methods are only two approaches for implementing defined switching state sequences in multileg multilevel inverters. The described generalized PWM approach for multileg multilevel inverters can be properly applied to different inverter topologies without difficulties. The proposed method is based on modifying of the modulating signals, depending on the dc-source variation. The additional common mode voltage can be designed for obtaining required PWM performance.

	Reduction of common mode currents generated by three-level inverters with consideration of motor overvoltages By BAUDESSON Philippe; LE MOIGNE Philippe; IDIR Nadir; FRANCHAUD Jean-Jacques; VIDET Arnaud	[View] [Download]
Abstract: In adjustable speed drive applications, the switching of the inverter semiconductors generates common mode currents as well as harmful overvoltages on the motor terminals when long cables are used. Consequently, bulky and expensive input and output filters must be used. This work aims at reducing these disturbances from their origin by using a three-level neutral-point-clamped (NPC) inverter controlled with a new pulse-width-modulation (PWM) strategy. Whereas previous common mode noise-reducing strategies usually generate higher overvoltages than conventional ones, the proposed PWM is able to manage both problems thanks to its internal degrees of freedom.