EPE Journal Volume 15-3 
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EPE Journal Volume 15-3 - Editorial
EPE Journal Volume 15-3 - Papers



 EPE Journal Volume 15-3 - Editorial 

Invitation to EPE-PEMC 2006, Portoroz, Slovenia  [Details]
By K. Jezernik

Editorial of EPE Journal Volume 15-3 - "Invitation to EPE-PEMC 2006, Portoroz, Slovenia", written by Prof. K. Jezernik, Conference Chairman of EPE-PEMC 2006.


 EPE Journal Volume 15-3 - Papers 

Optimisation of Low Voltage Power MOSFET Components for High Current Applications  [Details]
By A. Lindemann

Achievable current density of low voltage power MOSFET components has increased significantly over the past years. Those devices are mainly used in converters for automotive auxiliary drives or renewable energy. The paper outlines state of the art technology and gives an outlook on further development, taking into account the particular requirements of the aforementioned demanding applications.

An Integrated Single-Stage Quasi-Resonant Power Factor Correction Converter with Activez Clamp Circuit  [Details]
By J-Y Lee; G-W Moon

A new integrated single-stage zero current switched (ZCS) quasi-resonant converter (QRC) for the power factor correction (PFC) converter is introduced in this paper. The power factor correction can be achieved by the discontinuous conduction mode(DCM) operation of an input current. The proposed converter has the characteristics of the good power factor, low line current harmonics, and tight output regulation. Furthermore, the ringing effect due to the output capacitance of the main switch can be eliminated by use of active clamp circuit. A prototype converter has been designed and experimented based on design equations. The line current waveform of the prototype shows about 15% of total harmonic distortion at rated condition. Also, the efficiency and the power factor can be obtained about 87% and 0.985, respectively, at rated condition. The proposed converter is suitable for a low power level applications with a tightly regulated output voltage and a high switching frequency.

A Simple Stator Flux Oriented Induction Motor Control  [Details]
By F. Cupertino; G. L. Cascella; L. Salvatore; N. Salvatore

This paper presents a novel stator flux oriented induction motor control scheme. It utilises a sliding-mode controller in the stator flux control loop. The existence condition of sliding mode control is derived, and chattering suppression at steady-state is also considered. A proportional controller is used in the torque control loop to simplify the control scheme without compromising performance. Design formulas are given for the controller parameters. They are not based on the mathematical motor model but only need rated parameters. Experimental results are shown to prove the effectiveness of the control strategy in transient and steady state operations.

Robust Speed Control of a Low Damped Electromechanical System: Application to a Four Mass Experimental Test Bench  [Details]
By S. Poullain; P. Latteux; J.-L. Thomas; J. Sabatier; A. Oustaloup

Robust speed control of a low damped electromechanical system with backlash is studied, when the controlled load angular speed can not be measured. The proposed control strategy combines a Luenberger observer and a robust CRONE controller (CRONE is a French acronym for”Commande Robuste d’Ordre Non Entier”). The observer provides estimation of both load angular speed and disturbance torque applied to the load. Through the computation of only three independent parameters (as many as a PID controller), the CRONE controller permits to ensure the robust speed control of the load in spite of plant parametric variations and speed observations errors. The proposed control strategy is applied to a four mass experimental test bench.

A New Robust Experimentally Validated Phase Locked Loop for Power Electronic Control  [Details]
By M. C. Benhabib; S. Saadate

P.L.L is one of the circuits frequently used in control in power electronic, such as in active power filters. Its first role in electronic applications, is to identify the frequency (or the angular position) of a periodical signal, in order to generate another signal synchronised with the last one. However, many power applications need a perfect sine signal phase locked to the utility voltages. As the utility voltages are not always sinusoidal and balanced, a P.L.L is used in order to extract its fundamental component. In this paper, a classical P.L.L with all mathematical development confirmed by simulations will be first studied. Then a new robust solution, which provides very good results under unbalanced and distorted voltages, will be proposed. Simulations, validated by experimentations, will confirm the proposed design. An application case will be studied in order to illustrate the performances of this new P.L.L.

A Four-level Inverter Scheme with Reduced Common Mode Voltage for an Induction Motor Drive  [Details]
By R.S. Kanchan; P.N. Tekwani; M.R. Baiju; K. Gopakumar

A four-level inverter configuration for an induction motor is proposed in this paper. The drive used for this scheme is an open-end winding induction motor which can be obtained by separating the neutral connections of any general threephase induction motor. The proposed scheme uses two three-level inverters, with asymmetric DC link voltage, feeding the induction machine from both sides and can generate voltage space vector locations similar to a conventional seven-level inverter. The four-level scheme is based on the use of only those space vector combinations of the seven-level inverter, which generate zero common mode voltage in the machine phase voltages. The proposed four-level inverter scheme requires only two isolated DC links as compared to the conventional diode-clamped four-level inverter scheme, which needs three isolated power supplies. The common mode voltage, in the pole voltages of the proposed four-level inverter, is significantly lower than that of the conventional four-level inverter while the machine phase voltages have zero common mode content. The proposed power circuit bus structure is simple to fabricate when compared to the conventional four-level inverter. A SVPWM scheme is presented, which generates the inverter gate switching signals from sampled amplitudes of reference phase voltages. The proposed four-level inverter scheme is implemented of a 1.5 kW open-end winding induction motor and the experimental results are presented.