| |
Multi-Interleaved Zero-Ripple VRM to Power Future Microprocessors
| [View]
[Download]
|
| Author(s) |
GARINTO Dodi |
| Abstract |
This paper presents a converter architecture derived from the buck topology with merging principle of the multi-interleaving and zero-ripple techniques. The converter not only produces zero-ripple output, but also provides low-ripple input, so that filter requirements in the input and output sides can be reduced significantly. The proposed converter shows an ideal solution to power future microprocessors. |
| Download |
| Filename: | 0012-epe2007-full-20542360.pdf |
| Filesize: | 879.7 KB |
|
| Type |
Members Only |
| Date |
Last modified 2008-01-11 by System |
| |
 |