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Digitalizing Gate Control of High Efficiency, High Frequency and High Power Chopper Circuit SAZZ Using FPGA
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| Author(s) |
KAWAMURA Atsuo; TSURUTA Yukinori; PAVLOVSKY Martin |
| Abstract |
In the past, we have proposed a high frequency, high efficiency and high power chopper based on new soft switching topology SAZZ (Snubber Assisted Zero Voltage and Zero Current Transition chopper) for FCEV application. We studied the effectiveness of the SAZZ method by simulation and by experiment. This time we concentrated on digital control of SAZZ converter by FPGA. We report on the status quo of the digitalization of SAZZ gate control. |
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| Filename: | 0509-epe2007-full-13591510.pdf |
| Filesize: | 543.3 KB |
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| Type |
Members Only |
| Date |
Last modified 2008-01-11 by System |
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