For three-phase a.c.-a.c. power conversion a conventional matrix converter (CMC) or a d.c. side connection of a current DC link rectifier and a voltage d.c. link inverter comprising no energy storage components in the d.c. link could be employed. The combination of d.c. link converters does show a lower number of turn-off power semiconductors and, therefore, has been denoted as Sparse Matrix Converter (SMC) or Very Sparse Matrix Converter (VSMC). A limitation of the phase displacement of the current and voltage fundamentals at the input and at the output to ± ð/6 does allow a further reduction of the system complexity, accordingly the respective topology has been introduced in the literature as Ultra Sparse Matrix Converter (USMC). In this paper a novel concept for the analytical calculation of the current stresses on the power semiconductors of the Sparse Matrix Converter Topologies (SMC, VSMC, and USMC) is proposed. As a comparison to a digital simulation shows, the analytical results do show a very good accuracy in a wide modulation range and for widely varying load current phase angle and widely varying ratio of output and mains frequency. Therefore, the analytical results provide an excellent basis for the dimensioning of the SMC, VSMC or USMC and/or for the determination of the rated output power and efficiency which could be achieved by employing given power transistors and diodes.
| Filename: | EPE Journal 13-1 - 1 - Paper Schafmeister |
| Filesize: | 399.2 KB |
