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Deadbeat Control for Single Phase PWM Inverter using FPGA based Hardware Controller
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| Author(s) |
Michal Borkowski, Lukasz Dragan, Bartlomiej Kamiñski, Wlodzimierz Koczara |
| Abstract |
This paper presents hardware implementation of
digital control in an FPGA chip. The proposed solution leads to
an SoC (System on Chip) idea, where all components of a control
system are integrated into a single chip. Algorithm based on
deadbeat control was especially chosen for this project. This
digital control has following advantages: location of system poles
at the origin assure very fast system response, assignment of gain
matrix is defined by the deadbeat equation. The controller, except
from the main deadbeat regulator, includes state estimator and
disturbance observer. Experimental results are included to show
the validity of the proposed method. |
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| Filename: | 183 |
| Filesize: | 703.2 KB |
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| Type |
Members Only |
| Date |
Last modified 2006-02-08 by System |
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