| |
FPGA Implementation By Modular Design Reuse Mode To Optimize Hardware Architecture And Performance Of AC Motor Controller Algorithm
| [View]
[Download]
|
| Author(s) |
Yves-Andre Chapuis, Jean-Philippe Blonde, Francis Braun |
| Abstract |
Nowadays it is natural to consider VLSI technologies
and particularly FPGA components in field of electrical system
instead of/associated with software solutions (microprocessor,
DSP). However, hardware development still requires significant
contribution of the designer. The authors of this article propose
a modular methodology to guide the designer all along the
hardware design flow. This methodology, based on modular
mode and Data Flow Graph (DFG) representation, is very
convenient for designer. An example of a FPGA implementation
is studied in case of a controlled ac motor. This example allows
to prove how significant is the modular architecture in terms of
hardware amount and processing time optimization. It
demonstrated also improvement in case of design time to market
and control performance by reuse mode. |
| Download |
| Filename: | A32231 |
| Filesize: | 548.2 KB |
|
| Type |
Members Only |
| Date |
Last modified 2006-02-16 by System |
| |
 |