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PFC Strategies In Light Of EN 61000-3-2
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| Author(s) |
Supratim Basu, M. H. J. Bollen, Tore M. Undeland |
| Abstract |
This paper discusses the causes of input current
distortion in ac-dc single-phase rectifier-capacitor filter circuits.
The paper also explains the mandatory low-frequency harmonic
limits of the European standard EN-61000-3-2 and the way in
which these are applied to these circuits. Different power-factor
correction (PFC) techniques and strategies useful for meeting
this standard are explored in this paper. Simulations and
measurement results are provided for some of the techniques.
After providing an understanding of the Class A/D limits of the
standard, the transition boundary between them is defined. The
practical differences between the Class A/D limits and why it is
easier to meet the Class A limits, is clearly explained. Three
practical and popular power factor correction strategies are
discussed. The passive PFC approach with its various
advantages and disadvantages is explained. A solution to the
requirement of having a variable inductance for rectifier
circuits that have a variable load, towards meeting the Class A
limits, is proposed. After this the low frequency active PFC is
described. Lastly the popular high frequency active PFC scheme
is discussed explaining its clear advantages of being able to
simulate a unity power factor resistive load.
This paper will add to the discussion concerning the harmonic
limits by providing a number of feasible methods for limiting the
harmonic distortion and complying with EN/IEC 61000-3-2 and
other (future) standards. |
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| Filename: | A123656 |
| Filesize: | 339.4 KB |
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| Type |
Members Only |
| Date |
Last modified 2006-02-20 by System |
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