| |
Low On-Resistance 40V LDMOS with A New RESURF Structure in Submicron BCDMOS
| [View]
[Download]
|
| Author(s) |
S. K. Lee; Y. C. Choi; C. J. Kim; T. H. Kwon; H. S. Kang; C. S. Song |
| Abstract |
In this paper, we report the novel RESURF structure of LDMOS TR with p-bottom layer to improve
On-Resistance. The developed LDMOS achieved the low On-resistance, which is improved by 25%
compared to conventional structure LDMOS TR. In addition to this result, this LDMOS had the good
reliability because the high field point moves surface to bulk and showed the excellent safe operating
area compared to conventional structure. Technique and issues related to this transistor are concerned
and discussed. |
| Download |
| Filename: | EPE-PEMC2002 - T2-012 - Lee.pdf |
| Filesize: | 168.8 KB |
|
| Type |
Members Only |
| Date |
Last modified 2004-05-13 by System |
| |
 |