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Robust Vector Control of Electrical Drives Using Load Torque Estimation: An FPGA Implemented Synchronous Motor Application
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| Author(s) |
S. J. Dodds; R. Perryman; S. Jayasoma |
| Abstract |
A new control methodology for electrical drives is presented that offers high robustness to uncertainties in the dynamics of the driven load and unknown external load torques and yields a prescribed closed-loop dynamic response to reference inputs. The robustness is obtained using an observer which estimates the net load torque acting on the rotor of the motor that is equal to the sum of the external load torque and the dynamic load torque presented by the driven mechanical load. A control law is then formed that counteracts the real net load torque so that the closed-loop performance is virtually independent of the net load torque. A cascade control structure is employed in which the inner loop is a stator current control loop and the middle loop is a speed control loop yielding a first order dynamic response to a rotor speed reference input with prescribed settling time using the shaft speed estimate from the observer. This enables the drive to be used directly for speed control. If position control is required then an outer loop is closed around the speed control loop using the shaft encoder output. The gain of this loop and the settling time of the speed control loop are then set automatically to realise a second order closed-loop dynamic response to a shaft rotor position reference input having a settling time with either critical damping or a prescribed percentage overshoot. These features render the drive easily commissioned and used without the need for specialist expertise and also considerably aid the task of designing any control system in which the drive is embedded. Furthermore, existing vector controlled drives with digitally implemented controllers could be re-programmed to achieve the features presented here. The method is used to develop a synchronous motor based speed/position control system using a shaft encoder. The advance in the state-of-the-art inherent in the new control methodology is complemented by plans for a first-time implementation of the drive control system using FPGA technology to minimise the hardware complexity. The architecture of the system is fully explained. Simulation studies are presented, with emphasis on robustness and the effects of the encoder resolution at low or zero speeds during position control. |
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| Filename: | EPE-PEMC2002 - SSJV-03 - Dodds.pdf |
| Filesize: | 510.9 KB |
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| Type |
Members Only |
| Date |
Last modified 2004-05-13 by System |
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