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   Improvement of Single-Phase Power Factor Correction Circuits Using Sample-and-Hold Techniques   [View] 
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 Author(s)   Ninkoviæ P., Janda Ž. 
 Abstract   This paper describes improvement of single-phase PFC circuits made by using sample and hold technique in order to achieve minimum low harmonic content of the input current. Theoretical foundations are described and used to achieve a successful implementation. Guidelines for designing the regulator are presented. Experimental converter is built and tested. The results show that almost ideal THD is achieved (with high frequency content ignored) using novel technique with extremely high bandwidth. 
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Filename:EPE-PEMC2000 - 329 - Ninkoviae.pdf
Filesize:352.7 KB
 Type   Members Only 
 Date   Last modified 2004-04-28 by System