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FPGA Device Implementation of a PWM Modulation Algorithm for NPC IGBT Inverter with Optimized Device Effectiveness
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| Author(s) |
Scaglia A., Numeroli R., Vaccaro V. |
| Abstract |
The paper describes a pulse width modulation method for the control of a three level NPC IGBT inverter and its implementation into a FPGA device. The purpose of the paper is to present and discuss the main problems arising when implementing on a FPGA device the complex switching strategy of an NPC Inverter, without disregarding that suitable device resources must be reserved to protection and monitoring functions. The authors will highlight the choices done in order to optimize the device effectiveness. The implementation criteria are very important for the inverter performance since they influence the possibility of utilizing complex algorithms. They will also describe a compensation method, suitable for the particular modulator implementation, in order to stabilize the potential of the neutral point. Finally, the paper summarizes the results of experimental tests of the aforesaid control method which were performed by an inverter rated 2 MVA at 2400 V. |
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| Filename: | EPE-PEMC2000 - 182 - Scaglia.pdf |
| Filesize: | 377.5 KB |
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| Type |
Members Only |
| Date |
Last modified 2004-04-28 by System |
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