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A New Fabrication Technique of Trench DMOSFETs Employing Oxide Spacers and Self-Align Technique for DC-DC Converter Applications
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| Author(s) |
Kim J., Lee S.Y.*, Kim S.G., Nam K.S., Mun S.J., Koo J.G., Cho K.I. |
| Abstract |
A new process technology for fabricating high-density and low on-resistance trench MOSFETs with oxide spacers and self-align technique is realized. This technique reduces the process step, trench width, and source and p-body region with a resulting increase in cell density and current driving capability, and decrease in on-resistance as well as cost-effective production capability. Specific on-resistance of 0.41mW.cm2 with a blocking voltage of 43 is obtained. |
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| Filename: | EPE-PEMC2000 - 016 - Kim.pdf |
| Filesize: | 843.9 KB |
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| Type |
Members Only |
| Date |
Last modified 2004-04-28 by System |
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