In this paper a novel UPS topology is presented and analysed. The proposed UPS consists of three power stages. The first stage is a SMR which utilises a buck-boost converter for active power correction, the second stage is a high frequency inverter that provides ohmic isolation and voltage matching and last, the third stage is a low frequency SPWM inverter. Moreover, the proposed UPS exhibits sinusoidal input/output characteristics, high power density and simple control circuit.
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