| Abstract |
A method is presented to provide soft diode-to-transistor commutations in a three-level nested-cell
inverter, on the basis of an additional auxiliary pole. In order to limit the maximum peak current
through the auxiliary circuit, while keeping a wide margin of pulse-width modulation, gating signals
for the main and auxiliary switches are updated dynamically, by taking the output load current and
duty-cycle into account. To this purpose, design considerations for the additional components are also
given. The generation of accurate switching times is described, being validated by practical data. |
