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Losses Evaluation on Parallel Diodes Using a Double Pulse Test Circuit
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| Author(s) |
Gustavo HENN, Frédéric RAYMOND-LARUINA, Herminio DE OLIVEIRA FILHO, Tanguy PHULPIN |
| Abstract |
This paper aims to optimize efficiency by combining diodes, such as SiC Schottky or PiN Si in parallel. For each combination, conduction and switching losses are estimated using datasheet in addition to double pulse test circuit validation. The parallelization of each diode is studied to propose the best configuration. |
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| Filename: | 0122-epe2025-full-17500056.pdf |
| Filesize: | 630.5 KB |
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| Type |
Members Only |
| Date |
Last modified 2025-08-31 by System |
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