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Investigation into Current Sharing of Parallel SiC MOSFET Modules using a Gate-Driver with Sub-Nanosecond Time-Skew Capability
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| Author(s) |
Sebastian NEIRA, Ross MATHIESON, Mason PARKER, Paul JUDGE, Stephen FINNEY |
| Abstract |
This paper studies the current sharing behaviour of parallel-connected Silicon Carbide (SiC) modules, using a gate-driver capable of implementing sub-nanosecond delays between gate signals. The gate-driver is implemented with a central control unit complemented with programmable digital buffers to achieve a time-skew resolution of 0.5 ns. Results show the time resolution required to balance the current distribution in an experimental setup with four 1200 V/400 A SiC modules in parallel. Additionally, the potential of having a thermal runaway due to the current imbalance is analysed using the programmable delays to test the switch of the modules at temperatures up to 105°C. |
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| Filename: | 0509-epe2023-full-23492827.pdf |
| Filesize: | 2.608 MB |
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| Type |
Members Only |
| Date |
Last modified 2023-09-24 by System |
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